Add basic hardware configuration options for P8
This enables the configuration of the LFCLK source, as well as the target hardware board pin configuration.
This commit is contained in:

committed by
Riku Isokoski

parent
bab86633a0
commit
8b0559c481
14
src/main.cpp
14
src/main.cpp
@@ -300,10 +300,24 @@ void nimble_port_ll_task_func(void* args) {
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}
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}
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void calibrate_lf_clock_rc(nrf_drv_clock_evt_type_t event) {
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// 16 * 0.25s = 4s calibration cycle
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// Not recursive, call is deferred via internal calibration timer
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nrf_drv_clock_calibration_start(16, calibrate_lf_clock_rc);
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}
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int main(void) {
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logger.Init();
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nrf_drv_clock_init();
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nrf_drv_clock_lfclk_request(NULL);
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// The RC source for the LF clock has to be calibrated
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#if (CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC)
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while (!nrf_clock_lf_is_running()) {
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}
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nrf_drv_clock_calibration_start(0, calibrate_lf_clock_rc);
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#endif
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// Unblock i2c?
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nrf_gpio_cfg(Pinetime::PinMap::TwiScl,
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