arm: De-virtualize ThreadContext (#7119)

* arm: Move ARM_Interface to core namespace

* arm: De-virtualize ThreadContext
This commit is contained in:
GPUCode
2023-11-07 03:55:30 +02:00
committed by GitHub
parent 8fe147b8f9
commit 3f1f0aa7c2
24 changed files with 159 additions and 345 deletions

View File

@@ -19,6 +19,8 @@ namespace Memory {
struct PageTable;
};
namespace Core {
/// Generic ARM11 CPU interface
class ARM_Interface : NonCopyable {
public:
@@ -26,81 +28,44 @@ public:
: timer(timer), id(id){};
virtual ~ARM_Interface() {}
class ThreadContext {
friend class boost::serialization::access;
template <class Archive>
void save(Archive& ar, const unsigned int file_version) const {
for (std::size_t i = 0; i < 16; i++) {
const auto r = GetCpuRegister(i);
ar << r;
}
for (std::size_t i = 0; i < 64; i++) {
const auto r = GetFpuRegister(i);
ar << r;
}
const auto r1 = GetCpsr();
ar << r1;
const auto r2 = GetFpscr();
ar << r2;
const auto r3 = GetFpexc();
ar << r3;
}
template <class Archive>
void load(Archive& ar, const unsigned int file_version) {
u32 r;
for (std::size_t i = 0; i < 16; i++) {
ar >> r;
SetCpuRegister(i, r);
}
for (std::size_t i = 0; i < 64; i++) {
ar >> r;
SetFpuRegister(i, r);
}
ar >> r;
SetCpsr(r);
ar >> r;
SetFpscr(r);
ar >> r;
SetFpexc(r);
}
BOOST_SERIALIZATION_SPLIT_MEMBER()
public:
virtual ~ThreadContext() = default;
virtual void Reset() = 0;
virtual u32 GetCpuRegister(std::size_t index) const = 0;
virtual void SetCpuRegister(std::size_t index, u32 value) = 0;
virtual u32 GetCpsr() const = 0;
virtual void SetCpsr(u32 value) = 0;
virtual u32 GetFpuRegister(std::size_t index) const = 0;
virtual void SetFpuRegister(std::size_t index, u32 value) = 0;
virtual u32 GetFpscr() const = 0;
virtual void SetFpscr(u32 value) = 0;
virtual u32 GetFpexc() const = 0;
virtual void SetFpexc(u32 value) = 0;
struct ThreadContext {
u32 GetStackPointer() const {
return GetCpuRegister(13);
return cpu_registers[13];
}
void SetStackPointer(u32 value) {
return SetCpuRegister(13, value);
cpu_registers[13] = value;
}
u32 GetLinkRegister() const {
return GetCpuRegister(14);
return cpu_registers[14];
}
void SetLinkRegister(u32 value) {
return SetCpuRegister(14, value);
cpu_registers[14] = value;
}
u32 GetProgramCounter() const {
return GetCpuRegister(15);
return cpu_registers[15];
}
void SetProgramCounter(u32 value) {
return SetCpuRegister(15, value);
cpu_registers[15] = value;
}
std::array<u32, 16> cpu_registers{};
u32 cpsr{};
std::array<u32, 64> fpu_registers{};
u32 fpscr{};
u32 fpexc{};
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const unsigned int file_version) {
ar& cpu_registers;
ar& fpu_registers;
ar& cpsr;
ar& fpscr;
ar& fpexc;
}
};
@@ -132,7 +97,7 @@ public:
*/
virtual void SetPC(u32 addr) = 0;
/*
/**
* Get the current Program Counter
* @return Returns current PC
*/
@@ -206,29 +171,21 @@ public:
*/
virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
/**
* Creates a CPU context
* @note The created context may only be used with this instance.
*/
virtual std::unique_ptr<ThreadContext> NewContext() const = 0;
/**
* Saves the current CPU context
* @param ctx Thread context to save
*/
virtual void SaveContext(const std::unique_ptr<ThreadContext>& ctx) = 0;
virtual void SaveContext(ThreadContext& ctx) = 0;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
virtual void LoadContext(const std::unique_ptr<ThreadContext>& ctx) = 0;
virtual void LoadContext(const ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;
virtual void PurgeState() = 0;
Core::Timing::Timer& GetTimer() {
return *timer;
}
@@ -298,7 +255,7 @@ private:
template <class Archive>
void load(Archive& ar, const unsigned int file_version) {
PurgeState();
ClearInstructionCache();
ar >> timer;
ar >> id;
std::shared_ptr<Memory::PageTable> page_table{};
@@ -344,5 +301,7 @@ private:
BOOST_SERIALIZATION_SPLIT_MEMBER()
};
BOOST_CLASS_VERSION(ARM_Interface, 1)
BOOST_CLASS_VERSION(ARM_Interface::ThreadContext, 1)
} // namespace Core
BOOST_CLASS_VERSION(Core::ARM_Interface, 1)
BOOST_CLASS_VERSION(Core::ARM_Interface::ThreadContext, 1)

View File

@@ -17,61 +17,7 @@
#include "core/hle/kernel/svc.h"
#include "core/memory.h"
class DynarmicThreadContext final : public ARM_Interface::ThreadContext {
public:
DynarmicThreadContext() {
Reset();
}
~DynarmicThreadContext() override = default;
void Reset() override {
regs = {};
ext_regs = {};
cpsr = 0;
fpscr = 0;
fpexc = 0;
}
u32 GetCpuRegister(std::size_t index) const override {
return regs[index];
}
void SetCpuRegister(std::size_t index, u32 value) override {
regs[index] = value;
}
u32 GetCpsr() const override {
return cpsr;
}
void SetCpsr(u32 value) override {
cpsr = value;
}
u32 GetFpuRegister(std::size_t index) const override {
return ext_regs[index];
}
void SetFpuRegister(std::size_t index, u32 value) override {
ext_regs[index] = value;
}
u32 GetFpscr() const override {
return fpscr;
}
void SetFpscr(u32 value) override {
fpscr = value;
}
u32 GetFpexc() const override {
return fpexc;
}
void SetFpexc(u32 value) override {
fpexc = value;
}
private:
friend class ARM_Dynarmic;
std::array<u32, 16> regs;
std::array<u32, 64> ext_regs;
u32 cpsr;
u32 fpscr;
u32 fpexc;
};
namespace Core {
class DynarmicUserCallbacks final : public Dynarmic::A32::UserCallbacks {
public:
@@ -173,10 +119,10 @@ public:
Memory::MemorySystem& memory;
};
ARM_Dynarmic::ARM_Dynarmic(Core::System* system_, Memory::MemorySystem& memory_, u32 core_id_,
ARM_Dynarmic::ARM_Dynarmic(Core::System& system_, Memory::MemorySystem& memory_, u32 core_id_,
std::shared_ptr<Core::Timing::Timer> timer_,
Core::ExclusiveMonitor& exclusive_monitor_)
: ARM_Interface(core_id_, timer_), system(*system_), memory(memory_),
: ARM_Interface(core_id_, timer_), system(system_), memory(memory_),
cb(std::make_unique<DynarmicUserCallbacks>(*this)),
exclusive_monitor{dynamic_cast<Core::DynarmicExclusiveMonitor&>(exclusive_monitor_)} {
SetPageTable(memory.GetCurrentPageTable());
@@ -285,30 +231,20 @@ void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
}
}
std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
return std::make_unique<DynarmicThreadContext>();
void ARM_Dynarmic::SaveContext(ThreadContext& ctx) {
ctx.cpu_registers = jit->Regs();
ctx.cpsr = jit->Cpsr();
ctx.fpu_registers = jit->ExtRegs();
ctx.fpscr = jit->Fpscr();
ctx.fpexc = fpexc;
}
void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
ASSERT(ctx);
ctx->regs = jit->Regs();
ctx->ext_regs = jit->ExtRegs();
ctx->cpsr = jit->Cpsr();
ctx->fpscr = jit->Fpscr();
ctx->fpexc = fpexc;
}
void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
const DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
ASSERT(ctx);
jit->Regs() = ctx->regs;
jit->ExtRegs() = ctx->ext_regs;
jit->SetCpsr(ctx->cpsr);
jit->SetFpscr(ctx->fpscr);
fpexc = ctx->fpexc;
void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) {
jit->Regs() = ctx.cpu_registers;
jit->SetCpsr(ctx.cpsr);
jit->ExtRegs() = ctx.fpu_registers;
jit->SetFpscr(ctx.fpscr);
fpexc = ctx.fpexc;
}
void ARM_Dynarmic::PrepareReschedule() {
@@ -337,7 +273,7 @@ std::shared_ptr<Memory::PageTable> ARM_Dynarmic::GetPageTable() const {
void ARM_Dynarmic::SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) {
current_page_table = page_table;
auto ctx{NewContext()};
ThreadContext ctx{};
if (jit) {
SaveContext(ctx);
}
@@ -378,6 +314,4 @@ std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
return std::make_unique<Dynarmic::A32::Jit>(config);
}
void ARM_Dynarmic::PurgeState() {
ClearInstructionCache();
}
} // namespace Core

View File

@@ -17,16 +17,15 @@ class MemorySystem;
} // namespace Memory
namespace Core {
class DynarmicUserCallbacks;
class DynarmicExclusiveMonitor;
class ExclusiveMonitor;
class System;
} // namespace Core
class DynarmicUserCallbacks;
class ARM_Dynarmic final : public ARM_Interface {
public:
explicit ARM_Dynarmic(Core::System* system_, Memory::MemorySystem& memory_, u32 core_id_,
explicit ARM_Dynarmic(Core::System& system_, Memory::MemorySystem& memory_, u32 core_id_,
std::shared_ptr<Core::Timing::Timer> timer,
Core::ExclusiveMonitor& exclusive_monitor_);
~ARM_Dynarmic() override;
@@ -47,9 +46,8 @@ public:
u32 GetCP15Register(CP15Register reg) const override;
void SetCP15Register(CP15Register reg, u32 value) override;
std::unique_ptr<ThreadContext> NewContext() const override;
void SaveContext(const std::unique_ptr<ThreadContext>& arg) override;
void LoadContext(const std::unique_ptr<ThreadContext>& arg) override;
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;
void PrepareReschedule() override;
@@ -57,7 +55,6 @@ public:
void InvalidateCacheRange(u32 start_address, std::size_t length) override;
void ClearExclusiveState() override;
void SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) override;
void PurgeState() override;
protected:
std::shared_ptr<Memory::PageTable> GetPageTable() const override;
@@ -79,3 +76,5 @@ private:
std::shared_ptr<Memory::PageTable> current_page_table = nullptr;
std::map<std::shared_ptr<Memory::PageTable>, std::unique_ptr<Dynarmic::A32::Jit>> jits;
};
} // namespace Core

View File

@@ -32,7 +32,7 @@ public:
bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override;
private:
friend class ::ARM_Dynarmic;
friend class Core::ARM_Dynarmic;
Dynarmic::ExclusiveMonitor monitor;
Memory::MemorySystem& memory;
};

View File

@@ -12,73 +12,18 @@
#include "core/core.h"
#include "core/core_timing.h"
class DynComThreadContext final : public ARM_Interface::ThreadContext {
public:
DynComThreadContext() {
Reset();
}
~DynComThreadContext() override = default;
namespace Core {
void Reset() override {
cpu_registers = {};
cpsr = 0;
fpu_registers = {};
fpscr = 0;
fpexc = 0;
}
u32 GetCpuRegister(std::size_t index) const override {
return cpu_registers[index];
}
void SetCpuRegister(std::size_t index, u32 value) override {
cpu_registers[index] = value;
}
u32 GetCpsr() const override {
return cpsr;
}
void SetCpsr(u32 value) override {
cpsr = value;
}
u32 GetFpuRegister(std::size_t index) const override {
return fpu_registers[index];
}
void SetFpuRegister(std::size_t index, u32 value) override {
fpu_registers[index] = value;
}
u32 GetFpscr() const override {
return fpscr;
}
void SetFpscr(u32 value) override {
fpscr = value;
}
u32 GetFpexc() const override {
return fpexc;
}
void SetFpexc(u32 value) override {
fpexc = value;
}
private:
friend class ARM_DynCom;
std::array<u32, 16> cpu_registers;
u32 cpsr;
std::array<u32, 64> fpu_registers;
u32 fpscr;
u32 fpexc;
};
ARM_DynCom::ARM_DynCom(Core::System* system, Memory::MemorySystem& memory,
ARM_DynCom::ARM_DynCom(Core::System& system_, Memory::MemorySystem& memory,
PrivilegeMode initial_mode, u32 id,
std::shared_ptr<Core::Timing::Timer> timer)
: ARM_Interface(id, timer), system(system) {
: ARM_Interface(id, timer), system(system_) {
state = std::make_unique<ARMul_State>(system, memory, initial_mode);
}
ARM_DynCom::~ARM_DynCom() {}
void ARM_DynCom::Run() {
DEBUG_ASSERT(system != nullptr);
ExecuteInstructions(std::max<s64>(timer->GetDowncount(), 0));
}
@@ -103,8 +48,6 @@ std::shared_ptr<Memory::PageTable> ARM_DynCom::GetPageTable() const {
return nullptr;
}
void ARM_DynCom::PurgeState() {}
void ARM_DynCom::SetPC(u32 pc) {
state->Reg[15] = pc;
}
@@ -155,39 +98,31 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
void ARM_DynCom::ExecuteInstructions(u64 num_instructions) {
state->NumInstrsToExecute = num_instructions;
unsigned ticks_executed = InterpreterMainLoop(state.get());
if (system != nullptr) {
const u32 ticks_executed = InterpreterMainLoop(state.get());
if (timer) {
timer->AddTicks(ticks_executed);
}
state->ServeBreak();
}
std::unique_ptr<ARM_Interface::ThreadContext> ARM_DynCom::NewContext() const {
return std::make_unique<DynComThreadContext>();
void ARM_DynCom::SaveContext(ThreadContext& ctx) {
ctx.cpu_registers = state->Reg;
ctx.cpsr = state->Cpsr;
ctx.fpu_registers = state->ExtReg;
ctx.fpscr = state->VFP[VFP_FPSCR];
ctx.fpexc = state->VFP[VFP_FPEXC];
}
void ARM_DynCom::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
DynComThreadContext* ctx = dynamic_cast<DynComThreadContext*>(arg.get());
ASSERT(ctx);
ctx->cpu_registers = state->Reg;
ctx->cpsr = state->Cpsr;
ctx->fpu_registers = state->ExtReg;
ctx->fpscr = state->VFP[VFP_FPSCR];
ctx->fpexc = state->VFP[VFP_FPEXC];
}
void ARM_DynCom::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
DynComThreadContext* ctx = dynamic_cast<DynComThreadContext*>(arg.get());
ASSERT(ctx);
state->Reg = ctx->cpu_registers;
state->Cpsr = ctx->cpsr;
state->ExtReg = ctx->fpu_registers;
state->VFP[VFP_FPSCR] = ctx->fpscr;
state->VFP[VFP_FPEXC] = ctx->fpexc;
void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
state->Reg = ctx.cpu_registers;
state->Cpsr = ctx.cpsr;
state->ExtReg = ctx.fpu_registers;
state->VFP[VFP_FPSCR] = ctx.fpscr;
state->VFP[VFP_FPEXC] = ctx.fpexc;
}
void ARM_DynCom::PrepareReschedule() {
state->NumInstrsToExecute = 0;
}
} // namespace Core

View File

@@ -10,17 +10,17 @@
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/armstate.h"
namespace Core {
class System;
}
namespace Memory {
class MemorySystem;
}
namespace Core {
class System;
class ARM_DynCom final : public ARM_Interface {
public:
explicit ARM_DynCom(Core::System* system, Memory::MemorySystem& memory,
explicit ARM_DynCom(Core::System& system, Memory::MemorySystem& memory,
PrivilegeMode initial_mode, u32 id,
std::shared_ptr<Core::Timing::Timer> timer);
~ARM_DynCom() override;
@@ -45,13 +45,11 @@ public:
u32 GetCP15Register(CP15Register reg) const override;
void SetCP15Register(CP15Register reg, u32 value) override;
std::unique_ptr<ThreadContext> NewContext() const override;
void SaveContext(const std::unique_ptr<ThreadContext>& arg) override;
void LoadContext(const std::unique_ptr<ThreadContext>& arg) override;
void SaveContext(ThreadContext& ctx) override;
void LoadContext(const ThreadContext& ctx) override;
void SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) override;
void PrepareReschedule() override;
void PurgeState() override;
protected:
std::shared_ptr<Memory::PageTable> GetPageTable() const override;
@@ -59,6 +57,8 @@ protected:
private:
void ExecuteInstructions(u64 num_instructions);
Core::System* system;
Core::System& system;
std::unique_ptr<ARMul_State> state;
};
} // namespace Core

View File

@@ -3866,11 +3866,11 @@ SWI_INST : {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
DEBUG_ASSERT(cpu->system != nullptr);
swi_inst* const inst_cream = (swi_inst*)inst_base->component;
cpu->system->GetRunningCore().GetTimer().AddTicks(num_instrs);
cpu->system.GetRunningCore().GetTimer().AddTicks(num_instrs);
cpu->NumInstrsToExecute =
num_instrs >= cpu->NumInstrsToExecute ? 0 : cpu->NumInstrsToExecute - num_instrs;
num_instrs = 0;
Kernel::SVCContext{*cpu->system}.CallSVC(inst_cream->num & 0xFFFF);
Kernel::SVCContext{cpu->system}.CallSVC(inst_cream->num & 0xFFFF);
// The kernel would call ERET to get here, which clears exclusive memory state.
cpu->UnsetExclusiveMemoryAddress();
}

View File

@@ -10,9 +10,9 @@
#include "core/core.h"
#include "core/memory.h"
ARMul_State::ARMul_State(Core::System* system, Memory::MemorySystem& memory,
ARMul_State::ARMul_State(Core::System& system_, Memory::MemorySystem& memory_,
PrivilegeMode initial_mode)
: system(system), memory(memory) {
: system{system_}, memory{memory_} {
Reset();
ChangePrivilegeMode(initial_mode);
}
@@ -609,9 +609,8 @@ void ARMul_State::ServeBreak() {
DEBUG_ASSERT(Reg[15] == last_bkpt.address);
}
DEBUG_ASSERT(system != nullptr);
Kernel::Thread* thread = system->Kernel().GetCurrentThreadManager().GetCurrentThread();
system->GetRunningCore().SaveContext(thread->context);
Kernel::Thread* thread = system.Kernel().GetCurrentThreadManager().GetCurrentThread();
system.GetRunningCore().SaveContext(thread->context);
if (last_bkpt_hit || GDBStub::IsMemoryBreak() || GDBStub::GetCpuStepFlag()) {
last_bkpt_hit = false;

View File

@@ -147,7 +147,7 @@ enum {
struct ARMul_State final {
public:
explicit ARMul_State(Core::System* system, Memory::MemorySystem& memory,
explicit ARMul_State(Core::System& system, Memory::MemorySystem& memory,
PrivilegeMode initial_mode);
void ChangePrivilegeMode(u32 new_mode);
@@ -206,7 +206,7 @@ public:
void ServeBreak();
Core::System* system;
Core::System& system;
Memory::MemorySystem& memory;
std::array<u32, 16> Reg{}; // The current register file