arm: De-virtualize ThreadContext (#7119)
* arm: Move ARM_Interface to core namespace * arm: De-virtualize ThreadContext
This commit is contained in:
@@ -19,6 +19,8 @@ namespace Memory {
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struct PageTable;
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};
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namespace Core {
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/// Generic ARM11 CPU interface
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class ARM_Interface : NonCopyable {
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public:
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@@ -26,81 +28,44 @@ public:
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: timer(timer), id(id){};
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virtual ~ARM_Interface() {}
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class ThreadContext {
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friend class boost::serialization::access;
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template <class Archive>
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void save(Archive& ar, const unsigned int file_version) const {
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for (std::size_t i = 0; i < 16; i++) {
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const auto r = GetCpuRegister(i);
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ar << r;
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}
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for (std::size_t i = 0; i < 64; i++) {
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const auto r = GetFpuRegister(i);
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ar << r;
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}
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const auto r1 = GetCpsr();
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ar << r1;
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const auto r2 = GetFpscr();
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ar << r2;
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const auto r3 = GetFpexc();
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ar << r3;
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}
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template <class Archive>
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void load(Archive& ar, const unsigned int file_version) {
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u32 r;
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for (std::size_t i = 0; i < 16; i++) {
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ar >> r;
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SetCpuRegister(i, r);
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}
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for (std::size_t i = 0; i < 64; i++) {
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ar >> r;
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SetFpuRegister(i, r);
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}
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ar >> r;
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SetCpsr(r);
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ar >> r;
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SetFpscr(r);
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ar >> r;
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SetFpexc(r);
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}
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BOOST_SERIALIZATION_SPLIT_MEMBER()
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public:
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virtual ~ThreadContext() = default;
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virtual void Reset() = 0;
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virtual u32 GetCpuRegister(std::size_t index) const = 0;
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virtual void SetCpuRegister(std::size_t index, u32 value) = 0;
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virtual u32 GetCpsr() const = 0;
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virtual void SetCpsr(u32 value) = 0;
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virtual u32 GetFpuRegister(std::size_t index) const = 0;
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virtual void SetFpuRegister(std::size_t index, u32 value) = 0;
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virtual u32 GetFpscr() const = 0;
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virtual void SetFpscr(u32 value) = 0;
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virtual u32 GetFpexc() const = 0;
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virtual void SetFpexc(u32 value) = 0;
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struct ThreadContext {
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u32 GetStackPointer() const {
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return GetCpuRegister(13);
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return cpu_registers[13];
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}
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void SetStackPointer(u32 value) {
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return SetCpuRegister(13, value);
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cpu_registers[13] = value;
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}
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u32 GetLinkRegister() const {
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return GetCpuRegister(14);
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return cpu_registers[14];
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}
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void SetLinkRegister(u32 value) {
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return SetCpuRegister(14, value);
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cpu_registers[14] = value;
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}
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u32 GetProgramCounter() const {
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return GetCpuRegister(15);
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return cpu_registers[15];
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}
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void SetProgramCounter(u32 value) {
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return SetCpuRegister(15, value);
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cpu_registers[15] = value;
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}
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std::array<u32, 16> cpu_registers{};
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u32 cpsr{};
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std::array<u32, 64> fpu_registers{};
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u32 fpscr{};
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u32 fpexc{};
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private:
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friend class boost::serialization::access;
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template <class Archive>
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void serialize(Archive& ar, const unsigned int file_version) {
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ar& cpu_registers;
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ar& fpu_registers;
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ar& cpsr;
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ar& fpscr;
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ar& fpexc;
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}
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};
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@@ -132,7 +97,7 @@ public:
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*/
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virtual void SetPC(u32 addr) = 0;
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/*
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/**
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* Get the current Program Counter
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* @return Returns current PC
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*/
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@@ -206,29 +171,21 @@ public:
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*/
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virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
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/**
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* Creates a CPU context
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* @note The created context may only be used with this instance.
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*/
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virtual std::unique_ptr<ThreadContext> NewContext() const = 0;
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/**
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* Saves the current CPU context
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* @param ctx Thread context to save
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*/
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virtual void SaveContext(const std::unique_ptr<ThreadContext>& ctx) = 0;
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virtual void SaveContext(ThreadContext& ctx) = 0;
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/**
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* Loads a CPU context
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* @param ctx Thread context to load
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*/
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virtual void LoadContext(const std::unique_ptr<ThreadContext>& ctx) = 0;
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virtual void LoadContext(const ThreadContext& ctx) = 0;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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virtual void PurgeState() = 0;
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Core::Timing::Timer& GetTimer() {
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return *timer;
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}
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@@ -298,7 +255,7 @@ private:
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template <class Archive>
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void load(Archive& ar, const unsigned int file_version) {
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PurgeState();
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ClearInstructionCache();
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ar >> timer;
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ar >> id;
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std::shared_ptr<Memory::PageTable> page_table{};
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@@ -344,5 +301,7 @@ private:
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BOOST_SERIALIZATION_SPLIT_MEMBER()
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};
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BOOST_CLASS_VERSION(ARM_Interface, 1)
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BOOST_CLASS_VERSION(ARM_Interface::ThreadContext, 1)
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} // namespace Core
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BOOST_CLASS_VERSION(Core::ARM_Interface, 1)
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BOOST_CLASS_VERSION(Core::ARM_Interface::ThreadContext, 1)
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@@ -17,61 +17,7 @@
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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class DynarmicThreadContext final : public ARM_Interface::ThreadContext {
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public:
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DynarmicThreadContext() {
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Reset();
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}
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~DynarmicThreadContext() override = default;
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void Reset() override {
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regs = {};
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ext_regs = {};
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cpsr = 0;
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fpscr = 0;
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fpexc = 0;
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}
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u32 GetCpuRegister(std::size_t index) const override {
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return regs[index];
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}
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void SetCpuRegister(std::size_t index, u32 value) override {
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regs[index] = value;
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}
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u32 GetCpsr() const override {
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return cpsr;
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}
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void SetCpsr(u32 value) override {
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cpsr = value;
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}
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u32 GetFpuRegister(std::size_t index) const override {
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return ext_regs[index];
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}
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void SetFpuRegister(std::size_t index, u32 value) override {
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ext_regs[index] = value;
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}
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u32 GetFpscr() const override {
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return fpscr;
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}
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void SetFpscr(u32 value) override {
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fpscr = value;
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}
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u32 GetFpexc() const override {
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return fpexc;
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}
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void SetFpexc(u32 value) override {
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fpexc = value;
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}
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private:
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friend class ARM_Dynarmic;
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std::array<u32, 16> regs;
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std::array<u32, 64> ext_regs;
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u32 cpsr;
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u32 fpscr;
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u32 fpexc;
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};
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namespace Core {
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class DynarmicUserCallbacks final : public Dynarmic::A32::UserCallbacks {
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public:
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@@ -173,10 +119,10 @@ public:
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Memory::MemorySystem& memory;
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};
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ARM_Dynarmic::ARM_Dynarmic(Core::System* system_, Memory::MemorySystem& memory_, u32 core_id_,
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ARM_Dynarmic::ARM_Dynarmic(Core::System& system_, Memory::MemorySystem& memory_, u32 core_id_,
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std::shared_ptr<Core::Timing::Timer> timer_,
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Core::ExclusiveMonitor& exclusive_monitor_)
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: ARM_Interface(core_id_, timer_), system(*system_), memory(memory_),
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: ARM_Interface(core_id_, timer_), system(system_), memory(memory_),
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cb(std::make_unique<DynarmicUserCallbacks>(*this)),
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exclusive_monitor{dynamic_cast<Core::DynarmicExclusiveMonitor&>(exclusive_monitor_)} {
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SetPageTable(memory.GetCurrentPageTable());
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@@ -285,30 +231,20 @@ void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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}
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}
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
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return std::make_unique<DynarmicThreadContext>();
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void ARM_Dynarmic::SaveContext(ThreadContext& ctx) {
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ctx.cpu_registers = jit->Regs();
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ctx.cpsr = jit->Cpsr();
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ctx.fpu_registers = jit->ExtRegs();
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ctx.fpscr = jit->Fpscr();
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ctx.fpexc = fpexc;
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}
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void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
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DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
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ASSERT(ctx);
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ctx->regs = jit->Regs();
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ctx->ext_regs = jit->ExtRegs();
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ctx->cpsr = jit->Cpsr();
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ctx->fpscr = jit->Fpscr();
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ctx->fpexc = fpexc;
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}
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void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
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const DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
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ASSERT(ctx);
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jit->Regs() = ctx->regs;
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jit->ExtRegs() = ctx->ext_regs;
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jit->SetCpsr(ctx->cpsr);
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jit->SetFpscr(ctx->fpscr);
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fpexc = ctx->fpexc;
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void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) {
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jit->Regs() = ctx.cpu_registers;
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jit->SetCpsr(ctx.cpsr);
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jit->ExtRegs() = ctx.fpu_registers;
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jit->SetFpscr(ctx.fpscr);
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fpexc = ctx.fpexc;
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}
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void ARM_Dynarmic::PrepareReschedule() {
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@@ -337,7 +273,7 @@ std::shared_ptr<Memory::PageTable> ARM_Dynarmic::GetPageTable() const {
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void ARM_Dynarmic::SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) {
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current_page_table = page_table;
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auto ctx{NewContext()};
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ThreadContext ctx{};
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if (jit) {
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SaveContext(ctx);
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}
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@@ -378,6 +314,4 @@ std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
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return std::make_unique<Dynarmic::A32::Jit>(config);
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}
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void ARM_Dynarmic::PurgeState() {
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ClearInstructionCache();
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}
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} // namespace Core
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@@ -17,16 +17,15 @@ class MemorySystem;
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} // namespace Memory
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namespace Core {
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class DynarmicUserCallbacks;
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class DynarmicExclusiveMonitor;
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class ExclusiveMonitor;
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class System;
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} // namespace Core
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class DynarmicUserCallbacks;
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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explicit ARM_Dynarmic(Core::System* system_, Memory::MemorySystem& memory_, u32 core_id_,
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explicit ARM_Dynarmic(Core::System& system_, Memory::MemorySystem& memory_, u32 core_id_,
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std::shared_ptr<Core::Timing::Timer> timer,
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Core::ExclusiveMonitor& exclusive_monitor_);
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~ARM_Dynarmic() override;
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@@ -47,9 +46,8 @@ public:
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u32 GetCP15Register(CP15Register reg) const override;
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void SetCP15Register(CP15Register reg, u32 value) override;
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std::unique_ptr<ThreadContext> NewContext() const override;
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void SaveContext(const std::unique_ptr<ThreadContext>& arg) override;
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void LoadContext(const std::unique_ptr<ThreadContext>& arg) override;
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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@@ -57,7 +55,6 @@ public:
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void InvalidateCacheRange(u32 start_address, std::size_t length) override;
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void ClearExclusiveState() override;
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void SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) override;
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void PurgeState() override;
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protected:
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std::shared_ptr<Memory::PageTable> GetPageTable() const override;
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@@ -79,3 +76,5 @@ private:
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std::shared_ptr<Memory::PageTable> current_page_table = nullptr;
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std::map<std::shared_ptr<Memory::PageTable>, std::unique_ptr<Dynarmic::A32::Jit>> jits;
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};
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} // namespace Core
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@@ -32,7 +32,7 @@ public:
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bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override;
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private:
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friend class ::ARM_Dynarmic;
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friend class Core::ARM_Dynarmic;
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Dynarmic::ExclusiveMonitor monitor;
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Memory::MemorySystem& memory;
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};
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@@ -12,73 +12,18 @@
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#include "core/core.h"
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#include "core/core_timing.h"
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class DynComThreadContext final : public ARM_Interface::ThreadContext {
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public:
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DynComThreadContext() {
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Reset();
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}
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~DynComThreadContext() override = default;
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namespace Core {
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void Reset() override {
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cpu_registers = {};
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cpsr = 0;
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fpu_registers = {};
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fpscr = 0;
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fpexc = 0;
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}
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u32 GetCpuRegister(std::size_t index) const override {
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return cpu_registers[index];
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}
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void SetCpuRegister(std::size_t index, u32 value) override {
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cpu_registers[index] = value;
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}
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u32 GetCpsr() const override {
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return cpsr;
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}
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void SetCpsr(u32 value) override {
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cpsr = value;
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}
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u32 GetFpuRegister(std::size_t index) const override {
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return fpu_registers[index];
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}
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void SetFpuRegister(std::size_t index, u32 value) override {
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fpu_registers[index] = value;
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}
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u32 GetFpscr() const override {
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return fpscr;
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}
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void SetFpscr(u32 value) override {
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fpscr = value;
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}
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u32 GetFpexc() const override {
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return fpexc;
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}
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void SetFpexc(u32 value) override {
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fpexc = value;
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}
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private:
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friend class ARM_DynCom;
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std::array<u32, 16> cpu_registers;
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u32 cpsr;
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std::array<u32, 64> fpu_registers;
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u32 fpscr;
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u32 fpexc;
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};
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ARM_DynCom::ARM_DynCom(Core::System* system, Memory::MemorySystem& memory,
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ARM_DynCom::ARM_DynCom(Core::System& system_, Memory::MemorySystem& memory,
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PrivilegeMode initial_mode, u32 id,
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std::shared_ptr<Core::Timing::Timer> timer)
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: ARM_Interface(id, timer), system(system) {
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: ARM_Interface(id, timer), system(system_) {
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state = std::make_unique<ARMul_State>(system, memory, initial_mode);
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}
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ARM_DynCom::~ARM_DynCom() {}
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void ARM_DynCom::Run() {
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DEBUG_ASSERT(system != nullptr);
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ExecuteInstructions(std::max<s64>(timer->GetDowncount(), 0));
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}
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@@ -103,8 +48,6 @@ std::shared_ptr<Memory::PageTable> ARM_DynCom::GetPageTable() const {
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return nullptr;
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}
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void ARM_DynCom::PurgeState() {}
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void ARM_DynCom::SetPC(u32 pc) {
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state->Reg[15] = pc;
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}
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@@ -155,39 +98,31 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
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void ARM_DynCom::ExecuteInstructions(u64 num_instructions) {
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state->NumInstrsToExecute = num_instructions;
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unsigned ticks_executed = InterpreterMainLoop(state.get());
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if (system != nullptr) {
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const u32 ticks_executed = InterpreterMainLoop(state.get());
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if (timer) {
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timer->AddTicks(ticks_executed);
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}
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state->ServeBreak();
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}
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_DynCom::NewContext() const {
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return std::make_unique<DynComThreadContext>();
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void ARM_DynCom::SaveContext(ThreadContext& ctx) {
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ctx.cpu_registers = state->Reg;
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ctx.cpsr = state->Cpsr;
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ctx.fpu_registers = state->ExtReg;
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ctx.fpscr = state->VFP[VFP_FPSCR];
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ctx.fpexc = state->VFP[VFP_FPEXC];
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}
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void ARM_DynCom::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
|
||||
DynComThreadContext* ctx = dynamic_cast<DynComThreadContext*>(arg.get());
|
||||
ASSERT(ctx);
|
||||
|
||||
ctx->cpu_registers = state->Reg;
|
||||
ctx->cpsr = state->Cpsr;
|
||||
ctx->fpu_registers = state->ExtReg;
|
||||
ctx->fpscr = state->VFP[VFP_FPSCR];
|
||||
ctx->fpexc = state->VFP[VFP_FPEXC];
|
||||
}
|
||||
|
||||
void ARM_DynCom::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
|
||||
DynComThreadContext* ctx = dynamic_cast<DynComThreadContext*>(arg.get());
|
||||
ASSERT(ctx);
|
||||
|
||||
state->Reg = ctx->cpu_registers;
|
||||
state->Cpsr = ctx->cpsr;
|
||||
state->ExtReg = ctx->fpu_registers;
|
||||
state->VFP[VFP_FPSCR] = ctx->fpscr;
|
||||
state->VFP[VFP_FPEXC] = ctx->fpexc;
|
||||
void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
|
||||
state->Reg = ctx.cpu_registers;
|
||||
state->Cpsr = ctx.cpsr;
|
||||
state->ExtReg = ctx.fpu_registers;
|
||||
state->VFP[VFP_FPSCR] = ctx.fpscr;
|
||||
state->VFP[VFP_FPEXC] = ctx.fpexc;
|
||||
}
|
||||
|
||||
void ARM_DynCom::PrepareReschedule() {
|
||||
state->NumInstrsToExecute = 0;
|
||||
}
|
||||
|
||||
} // namespace Core
|
||||
|
||||
@@ -10,17 +10,17 @@
|
||||
#include "core/arm/skyeye_common/arm_regformat.h"
|
||||
#include "core/arm/skyeye_common/armstate.h"
|
||||
|
||||
namespace Core {
|
||||
class System;
|
||||
}
|
||||
|
||||
namespace Memory {
|
||||
class MemorySystem;
|
||||
}
|
||||
|
||||
namespace Core {
|
||||
|
||||
class System;
|
||||
|
||||
class ARM_DynCom final : public ARM_Interface {
|
||||
public:
|
||||
explicit ARM_DynCom(Core::System* system, Memory::MemorySystem& memory,
|
||||
explicit ARM_DynCom(Core::System& system, Memory::MemorySystem& memory,
|
||||
PrivilegeMode initial_mode, u32 id,
|
||||
std::shared_ptr<Core::Timing::Timer> timer);
|
||||
~ARM_DynCom() override;
|
||||
@@ -45,13 +45,11 @@ public:
|
||||
u32 GetCP15Register(CP15Register reg) const override;
|
||||
void SetCP15Register(CP15Register reg, u32 value) override;
|
||||
|
||||
std::unique_ptr<ThreadContext> NewContext() const override;
|
||||
void SaveContext(const std::unique_ptr<ThreadContext>& arg) override;
|
||||
void LoadContext(const std::unique_ptr<ThreadContext>& arg) override;
|
||||
void SaveContext(ThreadContext& ctx) override;
|
||||
void LoadContext(const ThreadContext& ctx) override;
|
||||
|
||||
void SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) override;
|
||||
void PrepareReschedule() override;
|
||||
void PurgeState() override;
|
||||
|
||||
protected:
|
||||
std::shared_ptr<Memory::PageTable> GetPageTable() const override;
|
||||
@@ -59,6 +57,8 @@ protected:
|
||||
private:
|
||||
void ExecuteInstructions(u64 num_instructions);
|
||||
|
||||
Core::System* system;
|
||||
Core::System& system;
|
||||
std::unique_ptr<ARMul_State> state;
|
||||
};
|
||||
|
||||
} // namespace Core
|
||||
|
||||
@@ -3866,11 +3866,11 @@ SWI_INST : {
|
||||
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
|
||||
DEBUG_ASSERT(cpu->system != nullptr);
|
||||
swi_inst* const inst_cream = (swi_inst*)inst_base->component;
|
||||
cpu->system->GetRunningCore().GetTimer().AddTicks(num_instrs);
|
||||
cpu->system.GetRunningCore().GetTimer().AddTicks(num_instrs);
|
||||
cpu->NumInstrsToExecute =
|
||||
num_instrs >= cpu->NumInstrsToExecute ? 0 : cpu->NumInstrsToExecute - num_instrs;
|
||||
num_instrs = 0;
|
||||
Kernel::SVCContext{*cpu->system}.CallSVC(inst_cream->num & 0xFFFF);
|
||||
Kernel::SVCContext{cpu->system}.CallSVC(inst_cream->num & 0xFFFF);
|
||||
// The kernel would call ERET to get here, which clears exclusive memory state.
|
||||
cpu->UnsetExclusiveMemoryAddress();
|
||||
}
|
||||
|
||||
@@ -10,9 +10,9 @@
|
||||
#include "core/core.h"
|
||||
#include "core/memory.h"
|
||||
|
||||
ARMul_State::ARMul_State(Core::System* system, Memory::MemorySystem& memory,
|
||||
ARMul_State::ARMul_State(Core::System& system_, Memory::MemorySystem& memory_,
|
||||
PrivilegeMode initial_mode)
|
||||
: system(system), memory(memory) {
|
||||
: system{system_}, memory{memory_} {
|
||||
Reset();
|
||||
ChangePrivilegeMode(initial_mode);
|
||||
}
|
||||
@@ -609,9 +609,8 @@ void ARMul_State::ServeBreak() {
|
||||
DEBUG_ASSERT(Reg[15] == last_bkpt.address);
|
||||
}
|
||||
|
||||
DEBUG_ASSERT(system != nullptr);
|
||||
Kernel::Thread* thread = system->Kernel().GetCurrentThreadManager().GetCurrentThread();
|
||||
system->GetRunningCore().SaveContext(thread->context);
|
||||
Kernel::Thread* thread = system.Kernel().GetCurrentThreadManager().GetCurrentThread();
|
||||
system.GetRunningCore().SaveContext(thread->context);
|
||||
|
||||
if (last_bkpt_hit || GDBStub::IsMemoryBreak() || GDBStub::GetCpuStepFlag()) {
|
||||
last_bkpt_hit = false;
|
||||
|
||||
@@ -147,7 +147,7 @@ enum {
|
||||
|
||||
struct ARMul_State final {
|
||||
public:
|
||||
explicit ARMul_State(Core::System* system, Memory::MemorySystem& memory,
|
||||
explicit ARMul_State(Core::System& system, Memory::MemorySystem& memory,
|
||||
PrivilegeMode initial_mode);
|
||||
|
||||
void ChangePrivilegeMode(u32 new_mode);
|
||||
@@ -206,7 +206,7 @@ public:
|
||||
|
||||
void ServeBreak();
|
||||
|
||||
Core::System* system;
|
||||
Core::System& system;
|
||||
Memory::MemorySystem& memory;
|
||||
|
||||
std::array<u32, 16> Reg{}; // The current register file
|
||||
|
||||
Reference in New Issue
Block a user