CCF_100/citra
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

dyncom: Minor cleanup

Browse Source 
Removes some unused macros and cleans up indentation inconsistencies
This commit is contained in:
Lioncash
2015-01-22 09:34:01 -05:00
parent 24a63662ba
commit 8810dfe1de
1 changed files with 270 additions and 282 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View File

@@ -34,16 +34,8 @@ enum {
THUMB = (1 << 7) THUMB = (1 << 7)
}; };
#define USER_MODE_OPT 1
#define HYBRID_MODE 0 // Enable for JIT mode
#define THRESHOLD 1000
#define DURATION 500
#define CHECK_RS if(RS == 15) rs += 8
#define CHECK_RM if(RM == 15) rm += 8
#undef BITS #undef BITS
#undef BIT
#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) #define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
#define BIT(s, n) ((s >> (n)) & 1) #define BIT(s, n) ((s >> (n)) & 1)
#define RM BITS(sht_oper, 0, 3) #define RM BITS(sht_oper, 0, 3)
@@ -702,9 +694,6 @@ void LnSWoUB(ScaledRegisterOffset)(arm_processor *cpu, unsigned int inst, unsign
virt_addr = addr; virt_addr = addr;
} }
#define ISNEG(n) (n < 0)
#define ISPOS(n) (n >= 0)
typedef struct _arm_inst { typedef struct _arm_inst {
unsigned int idx; unsigned int idx;
unsigned int cond; unsigned int cond;
@@ -1472,6 +1461,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index)
ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){
arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst));
cdp_inst *inst_cream = (cdp_inst *)inst_base->component; cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
inst_base->cond = BITS(inst, 28, 31); inst_base->cond = BITS(inst, 28, 31);
inst_base->idx = index; inst_base->idx = index;
inst_base->br = NON_BRANCH; inst_base->br = NON_BRANCH;
@@ -1525,9 +1515,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index)
inst_base->load_r15 = 0; inst_base->load_r15 = 0;
inst_cream->I = BIT(inst, 25); inst_cream->I = BIT(inst, 25);
//inst_cream->S = BIT(inst, 20);
inst_cream->Rn = BITS(inst, 16, 19); inst_cream->Rn = BITS(inst, 16, 19);
//inst_cream->Rd = BITS(inst, 12, 15);
if (CHECK_RN) if (CHECK_RN)
inst_base->load_r15 = 1; inst_base->load_r15 = 1;
inst_cream->shifter_operand = BITS(inst, 0, 11); inst_cream->shifter_operand = BITS(inst, 0, 11);
@@ -3533,7 +3522,6 @@ void insert_bb(unsigned int addr, int start) {
CreamCache[addr] = start; CreamCache[addr] = start;
} }
#define TRANS_THRESHOLD 65000
int find_bb(unsigned int addr, int &start) { int find_bb(unsigned int addr, int &start) {
int ret = -1; int ret = -1;
bb_map::const_iterator it = CreamCache.find(addr); bb_map::const_iterator it = CreamCache.find(addr);