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https://github.com/ryujinx-mirror/ryujinx.git
synced 2025-09-22 05:02:02 -05:00
Improve access to system registers by using properties, also use exclusive region granularity on exclusive load/stores, and ensure that acquires without releases won't hold the address forever, remove unused ALU rev method
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@@ -19,7 +19,7 @@ namespace Ryujinx.OsHle.Objects
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{
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Context.Memory.WriteInt32(Position + Offset, 5);
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}
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return 0;
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}
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@@ -138,7 +138,7 @@ namespace Ryujinx.OsHle
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Thread.Registers.SvcCall += SvcHandler.SvcCall;
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Thread.Registers.ProcessId = ProcessId;
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Thread.Registers.ThreadId = Ns.Os.IdGen.GenerateId();
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Thread.Registers.TlsAddr = TlsPageAddr + TlsSlot * TlsSize;
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Thread.Registers.Tpidr = TlsPageAddr + TlsSlot * TlsSize;
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Thread.Registers.X0 = (ulong)ArgsPtr;
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Thread.Registers.X1 = (ulong)Handle;
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Thread.Registers.X31 = (ulong)StackTop;
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@@ -165,7 +165,7 @@ namespace Ryujinx.OsHle
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{
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if (sender is AThread Thread)
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{
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TlsSlots.TryRemove(GetTlsSlot(Thread.Registers.TlsAddr), out _);
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TlsSlots.TryRemove(GetTlsSlot(Thread.Registers.Tpidr), out _);
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Ns.Os.IdGen.DeleteId(Thread.ThreadId);
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}
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@@ -39,7 +39,7 @@ namespace Ryujinx.OsHle.Svc
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private static void SvcGetSystemTick(Switch Ns, ARegisters Registers, AMemory Memory)
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{
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Registers.X0 = (ulong)Registers.GetSystemReg(3, 3, 14, 0, 1);
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Registers.X0 = (ulong)Registers.CntpctEl0;
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}
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private static void SvcConnectToNamedPort(Switch Ns, ARegisters Registers, AMemory Memory)
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@@ -70,7 +70,7 @@ namespace Ryujinx.OsHle.Svc
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private static void SendSyncRequest(Switch Ns, ARegisters Registers, AMemory Memory, bool IsUser)
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{
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long CmdPtr = Registers.TlsAddr;
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long CmdPtr = Registers.Tpidr;
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long Size = 0x100;
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int Handle = 0;
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