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shader: Add integer division opcodes
This commit is contained in:

committed by
Fernando Sahmkow

parent
43aa695a04
commit
95761cc6a7
@@ -304,6 +304,8 @@ void EmitIAdd64(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
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void EmitISub64(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
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void EmitSDiv32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
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void EmitUDiv32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b);
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void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
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void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
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@@ -90,6 +90,14 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("MUL.S {}.x,{},{};", inst, a, b);
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}
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void EmitSDiv32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("DIV.S {}.x,{},{};", inst, a, b);
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}
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void EmitUDiv32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) {
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ctx.Add("DIV.U {}.x,{},{};", inst, a, b);
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}
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void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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if (value.type != Type::Register && static_cast<s32>(value.imm_u32) < 0) {
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ctx.Add("MOV.S {},{};", inst, -static_cast<s32>(value.imm_u32));
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