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	| @@ -77,6 +77,12 @@ public: | ||||
|      */ | ||||
|     virtual u64 GetTicks() const = 0; | ||||
|  | ||||
|     /** | ||||
|      * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) | ||||
|      * @param ticks Number of ticks to advance the CPU core | ||||
|      */ | ||||
|     virtual void AddTicks(u64 ticks) = 0; | ||||
|  | ||||
|     /** | ||||
|      * Saves the current CPU context | ||||
|      * @param ctx Thread context to save | ||||
|   | ||||
| @@ -47,68 +47,38 @@ ARM_DynCom::ARM_DynCom() : ticks(0) { | ||||
| ARM_DynCom::~ARM_DynCom() { | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set the Program Counter to an address | ||||
|  * @param addr Address to set PC to | ||||
|  */ | ||||
| void ARM_DynCom::SetPC(u32 pc) { | ||||
|     state->pc = state->Reg[15] = pc; | ||||
| } | ||||
|  | ||||
| /* | ||||
|  * Get the current Program Counter | ||||
|  * @return Returns current PC | ||||
|  */ | ||||
| u32 ARM_DynCom::GetPC() const { | ||||
|     return state->Reg[15]; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Get an ARM register | ||||
|  * @param index Register index (0-15) | ||||
|  * @return Returns the value in the register | ||||
|  */ | ||||
| u32 ARM_DynCom::GetReg(int index) const { | ||||
|     return state->Reg[index]; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set an ARM register | ||||
|  * @param index Register index (0-15) | ||||
|  * @param value Value to set register to | ||||
|  */ | ||||
| void ARM_DynCom::SetReg(int index, u32 value) { | ||||
|     state->Reg[index] = value; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Get the current CPSR register | ||||
|  * @return Returns the value of the CPSR register | ||||
|  */ | ||||
| u32 ARM_DynCom::GetCPSR() const { | ||||
|     return state->Cpsr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set the current CPSR register | ||||
|  * @param cpsr Value to set CPSR to | ||||
|  */ | ||||
| void ARM_DynCom::SetCPSR(u32 cpsr) { | ||||
|     state->Cpsr = cpsr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Returns the number of clock ticks since the last reset | ||||
|  * @return Returns number of clock ticks | ||||
|  */ | ||||
| u64 ARM_DynCom::GetTicks() const { | ||||
|     return ticks; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Executes the given number of instructions | ||||
|  * @param num_instructions Number of instructions to executes | ||||
|  */ | ||||
| void ARM_DynCom::AddTicks(u64 ticks) { | ||||
|     this->ticks += ticks; | ||||
| } | ||||
|  | ||||
| void ARM_DynCom::ExecuteInstructions(int num_instructions) { | ||||
|     state->NumInstrsToExecute = num_instructions; | ||||
|  | ||||
| @@ -118,11 +88,6 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { | ||||
|     ticks += InterpreterMainLoop(state.get()); | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Saves the current CPU context | ||||
|  * @param ctx Thread context to save | ||||
|  * @todo Do we need to save Reg[15] and NextInstr? | ||||
|  */ | ||||
| void ARM_DynCom::SaveContext(ThreadContext& ctx) { | ||||
|     memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); | ||||
|     memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); | ||||
| @@ -139,11 +104,6 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) { | ||||
|     ctx.mode = state->NextInstr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Loads a CPU context | ||||
|  * @param ctx Thread context to load | ||||
|  * @param Do we need to load Reg[15] and NextInstr? | ||||
|  */ | ||||
| void ARM_DynCom::LoadContext(const ThreadContext& ctx) { | ||||
|     memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); | ||||
|     memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); | ||||
| @@ -160,7 +120,6 @@ void ARM_DynCom::LoadContext(const ThreadContext& ctx) { | ||||
|     state->NextInstr = ctx.mode; | ||||
| } | ||||
|  | ||||
| /// Prepare core for thread reschedule (if needed to correctly handle state) | ||||
| void ARM_DynCom::PrepareReschedule() { | ||||
|     state->NumInstrsToExecute = 0; | ||||
| } | ||||
|   | ||||
| @@ -27,14 +27,14 @@ public: | ||||
|      * Get the current Program Counter | ||||
|      * @return Returns current PC | ||||
|      */ | ||||
|     u32 GetPC() const; | ||||
|     u32 GetPC() const override; | ||||
|  | ||||
|     /** | ||||
|      * Get an ARM register | ||||
|      * @param index Register index (0-15) | ||||
|      * @return Returns the value in the register | ||||
|      */ | ||||
|     u32 GetReg(int index) const; | ||||
|     u32 GetReg(int index) const override; | ||||
|  | ||||
|     /** | ||||
|      * Set an ARM register | ||||
| @@ -47,7 +47,7 @@ public: | ||||
|      * Get the current CPSR register | ||||
|      * @return Returns the value of the CPSR register | ||||
|      */ | ||||
|     u32 GetCPSR() const; | ||||
|     u32 GetCPSR() const override; | ||||
|  | ||||
|     /** | ||||
|      * Set the current CPSR register | ||||
| @@ -59,7 +59,13 @@ public: | ||||
|      * Returns the number of clock ticks since the last reset | ||||
|      * @return Returns number of clock ticks | ||||
|      */ | ||||
|     u64 GetTicks() const; | ||||
|     u64 GetTicks() const override; | ||||
|  | ||||
|     /** | ||||
|     * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) | ||||
|     * @param ticks Number of ticks to advance the CPU core | ||||
|     */ | ||||
|     void AddTicks(u64 ticks) override; | ||||
|  | ||||
|     /** | ||||
|      * Saves the current CPU context | ||||
|   | ||||
| @@ -38,78 +38,43 @@ ARM_Interpreter::~ARM_Interpreter() { | ||||
|     delete state; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set the Program Counter to an address | ||||
|  * @param addr Address to set PC to | ||||
|  */ | ||||
| void ARM_Interpreter::SetPC(u32 pc) { | ||||
|     state->pc = state->Reg[15] = pc; | ||||
| } | ||||
|  | ||||
| /* | ||||
|  * Get the current Program Counter | ||||
|  * @return Returns current PC | ||||
|  */ | ||||
| u32 ARM_Interpreter::GetPC() const { | ||||
|     return state->pc; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Get an ARM register | ||||
|  * @param index Register index (0-15) | ||||
|  * @return Returns the value in the register | ||||
|  */ | ||||
| u32 ARM_Interpreter::GetReg(int index) const { | ||||
|     return state->Reg[index]; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set an ARM register | ||||
|  * @param index Register index (0-15) | ||||
|  * @param value Value to set register to | ||||
|  */ | ||||
| void ARM_Interpreter::SetReg(int index, u32 value) { | ||||
|     state->Reg[index] = value; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Get the current CPSR register | ||||
|  * @return Returns the value of the CPSR register | ||||
|  */ | ||||
| u32 ARM_Interpreter::GetCPSR() const { | ||||
|     return state->Cpsr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Set the current CPSR register | ||||
|  * @param cpsr Value to set CPSR to | ||||
|  */ | ||||
| void ARM_Interpreter::SetCPSR(u32 cpsr) { | ||||
|     state->Cpsr = cpsr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Returns the number of clock ticks since the last reset | ||||
|  * @return Returns number of clock ticks | ||||
|  */ | ||||
| u64 ARM_Interpreter::GetTicks() const { | ||||
|     return ARMul_Time(state); | ||||
|     return state->NumInstrs; | ||||
| } | ||||
|  | ||||
| void ARM_Interpreter::AddTicks(u64 ticks) { | ||||
|     state->NumInstrs += ticks; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Executes the given number of instructions | ||||
|  * @param num_instructions Number of instructions to executes | ||||
|  */ | ||||
| void ARM_Interpreter::ExecuteInstructions(int num_instructions) { | ||||
|     state->NumInstrsToExecute = num_instructions - 1; | ||||
|     ARMul_Emulate32(state); | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Saves the current CPU context | ||||
|  * @param ctx Thread context to save | ||||
|  * @todo Do we need to save Reg[15] and NextInstr? | ||||
|  */ | ||||
| void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | ||||
|     memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); | ||||
|     memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); | ||||
| @@ -126,11 +91,6 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | ||||
|     ctx.mode = state->NextInstr; | ||||
| } | ||||
|  | ||||
| /** | ||||
|  * Loads a CPU context | ||||
|  * @param ctx Thread context to load | ||||
|  * @param Do we need to load Reg[15] and NextInstr? | ||||
|  */ | ||||
| void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | ||||
|     memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); | ||||
|     memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); | ||||
| @@ -147,7 +107,6 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | ||||
|     state->NextInstr = ctx.mode; | ||||
| } | ||||
|  | ||||
| /// Prepare core for thread reschedule (if needed to correctly handle state) | ||||
| void ARM_Interpreter::PrepareReschedule() { | ||||
|     state->NumInstrsToExecute = 0; | ||||
| } | ||||
|   | ||||
| @@ -60,6 +60,12 @@ public: | ||||
|      */ | ||||
|     u64 GetTicks() const override; | ||||
|  | ||||
|     /** | ||||
|     * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) | ||||
|     * @param ticks Number of ticks to advance the CPU core | ||||
|     */ | ||||
|     void AddTicks(u64 ticks) override; | ||||
|  | ||||
|     /** | ||||
|      * Saves the current CPU context | ||||
|      * @param ctx Thread context to save | ||||
|   | ||||
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