linux-tkg: Switch from our local cpu optimizations patchset to Graysky's
https://github.com/graysky2/kernel_gcc_patch Fixes https://github.com/Tk-Glitch/PKGBUILDS/issues/569
This commit is contained in:
Tk-Glitch
parent
63be6c5384
commit
db6dab74c2
@ -89,7 +89,7 @@ pkgname=("${pkgbase}" "${pkgbase}-headers")
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_basekernel=5.4
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_sub=48
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pkgver="${_basekernel}"."${_sub}"
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pkgrel=64
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pkgrel=65
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pkgdesc='Linux-tkg'
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arch=('x86_64') # no i686 in here
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url="http://www.kernel.org/"
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@ -99,6 +99,7 @@ optdepends=('schedtool')
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options=('!strip')
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source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.xz"
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"https://www.kernel.org/pub/linux/kernel/v5.x/patch-${pkgver}.xz"
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"https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v4.19-v5.4.patch"
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'config.x86_64' # stock Arch config
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'config_hardened.x86_64' # hardened Arch config
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90-cleanup.hook
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@ -125,13 +126,14 @@ source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.x
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)
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sha256sums=('bf338980b1670bca287f9994b7441c2361907635879169c64ae78364efc5f491'
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'd9765b6202925693377e7ec71c2f514f563c9abf708722da76cb5939f0566c82'
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'27b7fc535ade94b636c3ec4e809e141831e9465a0ef55215a9852b87048629e2'
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'b7f23bbc09b6c571b76f851f0389386a6f3a64f3d7b1b8509c8550228b0f4537'
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'1f4a20d6eaaa0d969af93152a65191492400c6aa838fc1c290b0dd29bb6019d8'
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'1e15fc2ef3fa770217ecc63a220e5df2ddbcf3295eb4a021171e7edd4c6cc898'
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'66a03c246037451a77b4d448565b1d7e9368270c7d02872fbd0b5d024ed0a997'
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'31dc68e84aecfb7d069efb1305049122c65694676be8b955634abcf0675922a2'
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'd02bf5ca08fd610394b9d3a0c3b176d74af206f897dee826e5cbaec97bb4a4aa'
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'55db7c30c6d5e7d88cf38a4c757e447faf11a7440afbc081c3da12757073cca7'
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'156a2c75fd228920e3c3da5e04a110afa403951bdfbb85772c2fd4b82fd24d61'
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'7058e57fd68367b029adc77f2a82928f1433daaf02c8c279cb2d13556c8804d7'
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'c605f638d74c61861ebdc36ebd4cb8b6475eae2f6273e1ccb2bbb3e10a2ec3fe'
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'bc69d6e5ee8172b0242c8fa72d13cfe2b8d2b6601468836908a7dfe8b78a3bbb'
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@ -220,9 +222,15 @@ prepare() {
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patch -Np1 -i ../0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch
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fi
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# graysky's cpu opts - https://github.com/graysky2/kernel_gcc_patch
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msg2 "Applying graysky's cpu opts patch"
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patch -Np1 -i ../enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v4.19-v5.4.patch
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# TkG
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msg2 "Applying clear linux patches"
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patch -Np1 -i ../0002-clear-patches.patch
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msg2 "Applying glitched base patch"
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patch -Np1 -i ../0003-glitched-base.patch
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if [ "${_cpusched}" == "MuQSS" ]; then
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@ -294,6 +302,11 @@ prepare() {
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echo "# CONFIG_MSKYLAKEX is not set" >> ./.config
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echo "# CONFIG_MCANNONLAKE is not set" >> ./.config
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echo "# CONFIG_MICELAKE is not set" >> ./.config
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echo "# CONFIG_MGOLDMONT is not set" >> ./.config
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echo "# CONFIG_MGOLDMONTPLUS is not set" >> ./.config
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echo "# CONFIG_MCASCADELAKE is not set" >> ./.config
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echo "# CONFIG_MCOOPERLAKE is not set" >> ./.config
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echo "# CONFIG_MTIGERLAKE is not set" >> ./.config
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# Disable some debugging
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if [ "${_debugdisable}" == "true" ]; then
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@ -480,6 +493,16 @@ prepare() {
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sed -i -e 's/# CONFIG_MCANNONLAKE is not set/CONFIG_MCANNONLAKE=y/' ./.config
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elif [ "$_processor_opt" == "icelake" ]; then
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sed -i -e 's/# CONFIG_MICELAKE is not set/CONFIG_MICELAKE=y/' ./.config
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elif [ "$_processor_opt" == "goldmont" ]; then
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sed -i -e 's/# CONFIG_MGOLDMONT is not set/CONFIG_MGOLDMONT=y/' ./.config
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elif [ "$_processor_opt" == "goldmontplus" ]; then
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sed -i -e 's/# CONFIG_MGOLDMONTPLUS is not set/CONFIG_MGOLDMONTPLUS=y/' ./.config
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elif [ "$_processor_opt" == "cascadelake" ]; then
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sed -i -e 's/# CONFIG_MCASCADELAKE is not set/CONFIG_MCASCADELAKE=y/' ./.config
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elif [ "$_processor_opt" == "cooperlake" ]; then
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sed -i -e 's/# CONFIG_MCOOPERLAKE is not set/CONFIG_MCOOPERLAKE=y/' ./.config
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elif [ "$_processor_opt" == "tigerlake" ]; then
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sed -i -e 's/# CONFIG_MTIGERLAKE is not set/CONFIG_MTIGERLAKE=y/' ./.config
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fi
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# irq threading
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@ -18,7 +18,7 @@ If you want to streamline your kernel config for lower footprint and faster comp
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You can enable support for it at the beginning of the PKGBUILD file. Make sure to read everything you need to know about it.
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## Other stuff included:
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- Per-CPU-arch native optimizations
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- Graysky's per-CPU-arch native optimizations - https://github.com/graysky2/kernel_gcc_patch
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- built-in -O3 optimization and -O3 specific fixes
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- memory management and swapping tweaks
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- scheduling tweaks
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@ -104,7 +104,7 @@ _compileroptlevel="2"
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# CPU compiler optimizations - Defaults to generic optimizations if left empty
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# AMD CPUs : "k8" "k8sse3" "k10" "barcelona" "bobcat" "jaguar" "bulldozer" "piledriver" "steamroller" "excavator" "zen" "zen2"
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# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake"
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# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake" "cooperlake" "tigerlake"
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# Other options :
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# - "generic" (to share the package between machines with different CPUs)
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# - "native" (use compiler autodetection and will prompt for P6_NOPS - Selecting your arch manually in the list above is recommended instead of this option)
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@ -18,593 +18,6 @@ index 87f1fc9..b3be470 100755
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if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi
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UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP"
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diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
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index 6adce15268bd..f8612b07d32f 100644
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--- a/arch/x86/Kconfig.cpu
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+++ b/arch/x86/Kconfig.cpu
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@@ -116,6 +116,7 @@ config MPENTIUMM
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config MPENTIUM4
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bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
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depends on X86_32
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+ select X86_P6_NOP
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---help---
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Select this for Intel Pentium 4 chips. This includes the
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Pentium 4, Pentium D, P4-based Celeron and Xeon, and
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@@ -148,9 +149,8 @@ config MPENTIUM4
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-Paxville
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-Dempsey
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-
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config MK6
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- bool "K6/K6-II/K6-III"
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+ bool "AMD K6/K6-II/K6-III"
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depends on X86_32
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---help---
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Select this for an AMD K6-family processor. Enables use of
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@@ -158,7 +158,7 @@ config MK6
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flags to GCC.
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config MK7
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- bool "Athlon/Duron/K7"
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+ bool "AMD Athlon/Duron/K7"
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depends on X86_32
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---help---
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Select this for an AMD Athlon K7-family processor. Enables use of
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@@ -166,12 +166,83 @@ config MK7
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flags to GCC.
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config MK8
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- bool "Opteron/Athlon64/Hammer/K8"
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+ bool "AMD Opteron/Athlon64/Hammer/K8"
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---help---
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Select this for an AMD Opteron or Athlon64 Hammer-family processor.
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Enables use of some extended instructions, and passes appropriate
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optimization flags to GCC.
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+config MK8SSE3
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+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
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+ ---help---
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+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
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+ Enables use of some extended instructions, and passes appropriate
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+ optimization flags to GCC.
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+
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+config MK10
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+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
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+ ---help---
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+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
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+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
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+ Enables use of some extended instructions, and passes appropriate
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+ optimization flags to GCC.
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+
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+config MBARCELONA
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+ bool "AMD Barcelona"
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+ ---help---
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+ Select this for AMD Family 10h Barcelona processors.
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+
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+ Enables -march=barcelona
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+
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+config MBOBCAT
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+ bool "AMD Bobcat"
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+ ---help---
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+ Select this for AMD Family 14h Bobcat processors.
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+
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+ Enables -march=btver1
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+
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+config MJAGUAR
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+ bool "AMD Jaguar"
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+ ---help---
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+ Select this for AMD Family 16h Jaguar processors.
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+
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+ Enables -march=btver2
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+
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+config MBULLDOZER
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+ bool "AMD Bulldozer"
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+ ---help---
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+ Select this for AMD Family 15h Bulldozer processors.
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+
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+ Enables -march=bdver1
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+
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+config MPILEDRIVER
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+ bool "AMD Piledriver"
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+ ---help---
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+ Select this for AMD Family 15h Piledriver processors.
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+
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+ Enables -march=bdver2
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+
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+config MSTEAMROLLER
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+ bool "AMD Steamroller"
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+ ---help---
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+ Select this for AMD Family 15h Steamroller processors.
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+
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+ Enables -march=bdver3
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+
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+config MEXCAVATOR
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+ bool "AMD Excavator"
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+ ---help---
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+ Select this for AMD Family 15h Excavator processors.
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+
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+ Enables -march=bdver4
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+
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+config MZEN
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+ bool "AMD Zen"
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+ ---help---
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+ Select this for AMD Family 17h Zen processors.
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+
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+ Enables -march=znver1
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+
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config MCRUSOE
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bool "Crusoe"
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depends on X86_32
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@@ -253,6 +324,7 @@ config MVIAC7
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config MPSC
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bool "Intel P4 / older Netburst based Xeon"
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+ select X86_P6_NOP
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depends on X86_64
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---help---
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Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
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@@ -262,8 +334,19 @@ config MPSC
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using the cpu family field
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in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
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+config MATOM
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+ bool "Intel Atom"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for the Intel Atom platform. Intel Atom CPUs have an
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+ in-order pipelining architecture and thus can benefit from
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+ accordingly optimized code. Use a recent GCC with specific Atom
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+ support in order to fully benefit from selecting this option.
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+
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config MCORE2
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- bool "Core 2/newer Xeon"
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+ bool "Intel Core 2"
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+ select X86_P6_NOP
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---help---
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Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
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@@ -271,14 +354,106 @@ config MCORE2
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family in /proc/cpuinfo. Newer ones have 6 and older ones 15
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(not a typo)
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-config MATOM
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- bool "Intel Atom"
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+ Enables -march=core2
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+
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+config MNEHALEM
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+ bool "Intel Nehalem"
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+ select X86_P6_NOP
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---help---
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- Select this for the Intel Atom platform. Intel Atom CPUs have an
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- in-order pipelining architecture and thus can benefit from
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- accordingly optimized code. Use a recent GCC with specific Atom
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- support in order to fully benefit from selecting this option.
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+ Select this for 1st Gen Core processors in the Nehalem family.
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+
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+ Enables -march=nehalem
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+
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+config MWESTMERE
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+ bool "Intel Westmere"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for the Intel Westmere formerly Nehalem-C family.
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+
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+ Enables -march=westmere
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+
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+config MSILVERMONT
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+ bool "Intel Silvermont"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for the Intel Silvermont platform.
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+
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+ Enables -march=silvermont
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+
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+config MSANDYBRIDGE
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+ bool "Intel Sandy Bridge"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
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+
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+ Enables -march=sandybridge
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+
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+config MIVYBRIDGE
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+ bool "Intel Ivy Bridge"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
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+
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+ Enables -march=ivybridge
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+
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+config MHASWELL
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+ bool "Intel Haswell"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 4th Gen Core processors in the Haswell family.
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+
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+ Enables -march=haswell
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+
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+config MBROADWELL
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+ bool "Intel Broadwell"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 5th Gen Core processors in the Broadwell family.
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+
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+ Enables -march=broadwell
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+
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+config MSKYLAKE
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+ bool "Intel Skylake"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 6th Gen Core processors in the Skylake family.
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+
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+ Enables -march=skylake
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+
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+config MSKYLAKEX
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+ bool "Intel Skylake X"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 6th Gen Core processors in the Skylake X family.
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+
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+ Enables -march=skylake-avx512
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+
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+config MCANNONLAKE
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+ bool "Intel Cannon Lake"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 8th Gen Core processors
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+
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+ Enables -march=cannonlake
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+
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+config MICELAKE
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+ bool "Intel Ice Lake"
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+ select X86_P6_NOP
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+ ---help---
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+
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+ Select this for 8th Gen Core processors in the Ice Lake family.
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+
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+ Enables -march=icelake
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config GENERIC_CPU
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bool "Generic-x86-64"
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@@ -287,6 +462,19 @@ config GENERIC_CPU
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Generic x86-64 CPU.
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Run equally well on all x86-64 CPUs.
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+config MNATIVE
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+ bool "Native optimizations autodetected by GCC"
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+ ---help---
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+
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+ GCC 4.2 and above support -march=native, which automatically detects
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+ the optimum settings to use based on your processor. -march=native
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+ also detects and applies additional settings beyond -march specific
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+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
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+ (e.g. distcc cross-compiling), you should probably be using
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+ -march=native rather than anything listed below.
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+
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+ Enables -march=native
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+
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endchoice
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config X86_GENERIC
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@@ -311,7 +499,7 @@ config X86_INTERNODE_CACHE_SHIFT
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config X86_L1_CACHE_SHIFT
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int
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default "7" if MPENTIUM4 || MPSC
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- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
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+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
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default "4" if MELAN || M486 || MGEODEGX1
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default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
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@@ -329,35 +517,36 @@ config X86_ALIGNMENT_16
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||||
config X86_INTEL_USERCOPY
|
||||
def_bool y
|
||||
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
|
||||
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE
|
||||
|
||||
config X86_USE_PPRO_CHECKSUM
|
||||
def_bool y
|
||||
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
|
||||
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MATOM || MNATIVE
|
||||
|
||||
config X86_USE_3DNOW
|
||||
def_bool y
|
||||
depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
|
||||
|
||||
-#
|
||||
-# P6_NOPs are a relatively minor optimization that require a family >=
|
||||
-# 6 processor, except that it is broken on certain VIA chips.
|
||||
-# Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
-# (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
-# does not understand them.
|
||||
-#
|
||||
-# As a result, disallow these if we're not compiling for X86_64 (these
|
||||
-# NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
-# the right-hand clause are the cores that benefit from this optimization.
|
||||
-#
|
||||
config X86_P6_NOP
|
||||
- def_bool y
|
||||
- depends on X86_64
|
||||
- depends on (MCORE2 || MPENTIUM4 || MPSC)
|
||||
+ default n
|
||||
+ bool "Support for P6_NOPs on Intel chips"
|
||||
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE)
|
||||
+ ---help---
|
||||
+ P6_NOPs are a relatively minor optimization that require a family >=
|
||||
+ 6 processor, except that it is broken on certain VIA chips.
|
||||
+ Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
+ (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
+ does not understand them.
|
||||
+
|
||||
+ As a result, disallow these if we're not compiling for X86_64 (these
|
||||
+ NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
+ the right-hand clause are the cores that benefit from this optimization.
|
||||
+
|
||||
+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
|
||||
|
||||
config X86_TSC
|
||||
def_bool y
|
||||
- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
|
||||
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM) || X86_64
|
||||
|
||||
config X86_CMPXCHG64
|
||||
def_bool y
|
||||
@@ -367,7 +556,7 @@ config X86_CMPXCHG64
|
||||
# generates cmov.
|
||||
config X86_CMOV
|
||||
def_bool y
|
||||
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
|
||||
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
|
||||
config X86_MINIMUM_CPU_FAMILY
|
||||
int
|
||||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
|
||||
index 85a66c4a8b65..1cdf77b9800e 100644
|
||||
--- a/arch/x86/Makefile
|
||||
+++ b/arch/x86/Makefile
|
||||
@@ -118,13 +118,46 @@ else
|
||||
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
|
||||
|
||||
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
|
||||
+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
|
||||
+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
|
||||
+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
|
||||
+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
|
||||
+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
|
||||
+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
|
||||
+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
|
||||
+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
|
||||
+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
|
||||
+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
|
||||
+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
|
||||
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
|
||||
|
||||
cflags-$(CONFIG_MCORE2) += \
|
||||
- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
|
||||
- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
|
||||
+ cflags-$(CONFIG_MNEHALEM) += \
|
||||
+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
|
||||
+ cflags-$(CONFIG_MWESTMERE) += \
|
||||
+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
|
||||
+ cflags-$(CONFIG_MSILVERMONT) += \
|
||||
+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
|
||||
+ cflags-$(CONFIG_MSANDYBRIDGE) += \
|
||||
+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
|
||||
+ cflags-$(CONFIG_MIVYBRIDGE) += \
|
||||
+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
|
||||
+ cflags-$(CONFIG_MHASWELL) += \
|
||||
+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
|
||||
+ cflags-$(CONFIG_MBROADWELL) += \
|
||||
+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
|
||||
+ cflags-$(CONFIG_MSKYLAKE) += \
|
||||
+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
|
||||
+ cflags-$(CONFIG_MSKYLAKEX) += \
|
||||
+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
|
||||
+ cflags-$(CONFIG_MCANNONLAKE) += \
|
||||
+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
|
||||
+ cflags-$(CONFIG_MICELAKE) += \
|
||||
+ $(call cc-option,-march=icelake,$(call cc-option,-mtune=icelake))
|
||||
+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
|
||||
KBUILD_CFLAGS += $(cflags-y)
|
||||
|
||||
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
|
||||
index 1f5faf8606b4..14a6d19995cc 100644
|
||||
--- a/arch/x86/Makefile_32.cpu
|
||||
+++ b/arch/x86/Makefile_32.cpu
|
||||
@@ -23,7 +23,18 @@ cflags-$(CONFIG_MK6) += -march=k6
|
||||
# Please note, that patches that add -march=athlon-xp and friends are pointless.
|
||||
# They make zero difference whatsosever to performance at this time.
|
||||
cflags-$(CONFIG_MK7) += -march=athlon
|
||||
+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
|
||||
+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
|
||||
+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
|
||||
+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
|
||||
+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
|
||||
+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
|
||||
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
|
||||
@@ -32,8 +43,19 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) -falign-fu
|
||||
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
|
||||
cflags-$(CONFIG_MVIAC7) += -march=i686
|
||||
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
|
||||
-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
|
||||
+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
|
||||
+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
|
||||
+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
|
||||
+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
|
||||
+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
|
||||
+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
|
||||
+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
|
||||
+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
|
||||
+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
|
||||
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake)
|
||||
+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
|
||||
# AMD Elan support
|
||||
cflags-$(CONFIG_MELAN) += -march=i486
|
||||
diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h
|
||||
index 7948a17febb4..44b776297dc3 100644
|
||||
--- a/arch/x86/include/asm/module.h
|
||||
+++ b/arch/x86/include/asm/module.h
|
||||
@@ -25,6 +25,30 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "586MMX "
|
||||
#elif defined CONFIG_MCORE2
|
||||
#define MODULE_PROC_FAMILY "CORE2 "
|
||||
+#elif defined CONFIG_MNATIVE
|
||||
+#define MODULE_PROC_FAMILY "NATIVE "
|
||||
+#elif defined CONFIG_MNEHALEM
|
||||
+#define MODULE_PROC_FAMILY "NEHALEM "
|
||||
+#elif defined CONFIG_MWESTMERE
|
||||
+#define MODULE_PROC_FAMILY "WESTMERE "
|
||||
+#elif defined CONFIG_MSILVERMONT
|
||||
+#define MODULE_PROC_FAMILY "SILVERMONT "
|
||||
+#elif defined CONFIG_MSANDYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
|
||||
+#elif defined CONFIG_MIVYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "IVYBRIDGE "
|
||||
+#elif defined CONFIG_MHASWELL
|
||||
+#define MODULE_PROC_FAMILY "HASWELL "
|
||||
+#elif defined CONFIG_MBROADWELL
|
||||
+#define MODULE_PROC_FAMILY "BROADWELL "
|
||||
+#elif defined CONFIG_MSKYLAKE
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKE "
|
||||
+#elif defined CONFIG_MSKYLAKEX
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKEX "
|
||||
+#elif defined CONFIG_MCANNONLAKE
|
||||
+#define MODULE_PROC_FAMILY "CANNONLAKE "
|
||||
+#elif defined CONFIG_MICELAKE
|
||||
+#define MODULE_PROC_FAMILY "ICELAKE "
|
||||
#elif defined CONFIG_MATOM
|
||||
#define MODULE_PROC_FAMILY "ATOM "
|
||||
#elif defined CONFIG_M686
|
||||
@@ -43,6 +67,26 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "K7 "
|
||||
#elif defined CONFIG_MK8
|
||||
#define MODULE_PROC_FAMILY "K8 "
|
||||
+#elif defined CONFIG_MK8SSE3
|
||||
+#define MODULE_PROC_FAMILY "K8SSE3 "
|
||||
+#elif defined CONFIG_MK10
|
||||
+#define MODULE_PROC_FAMILY "K10 "
|
||||
+#elif defined CONFIG_MBARCELONA
|
||||
+#define MODULE_PROC_FAMILY "BARCELONA "
|
||||
+#elif defined CONFIG_MBOBCAT
|
||||
+#define MODULE_PROC_FAMILY "BOBCAT "
|
||||
+#elif defined CONFIG_MBULLDOZER
|
||||
+#define MODULE_PROC_FAMILY "BULLDOZER "
|
||||
+#elif defined CONFIG_MPILEDRIVER
|
||||
+#define MODULE_PROC_FAMILY "PILEDRIVER "
|
||||
+#elif defined CONFIG_MSTEAMROLLER
|
||||
+#define MODULE_PROC_FAMILY "STEAMROLLER "
|
||||
+#elif defined CONFIG_MJAGUAR
|
||||
+#define MODULE_PROC_FAMILY "JAGUAR "
|
||||
+#elif defined CONFIG_MEXCAVATOR
|
||||
+#define MODULE_PROC_FAMILY "EXCAVATOR "
|
||||
+#elif defined CONFIG_MZEN
|
||||
+#define MODULE_PROC_FAMILY "ZEN "
|
||||
#elif defined CONFIG_MELAN
|
||||
#define MODULE_PROC_FAMILY "ELAN "
|
||||
#elif defined CONFIG_MCRUSOE
|
||||
|
||||
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
|
||||
index f8612b07d32ff98381b61cbb21a116af6317c5e9..40f651bb363a0c368bc28c3ff0112d60c757003f 100644
|
||||
--- a/arch/x86/Kconfig.cpu
|
||||
+++ b/arch/x86/Kconfig.cpu
|
||||
@@ -243,6 +243,13 @@ config MZEN
|
||||
|
||||
Enables -march=znver1
|
||||
|
||||
+config MZEN2
|
||||
+ bool "AMD Zen 2"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 17h Zen 2 processors.
|
||||
+
|
||||
+ Enables -march=znver2
|
||||
+
|
||||
config MCRUSOE
|
||||
bool "Crusoe"
|
||||
depends on X86_32
|
||||
@@ -499,7 +506,7 @@ config X86_INTERNODE_CACHE_SHIFT
|
||||
config X86_L1_CACHE_SHIFT
|
||||
int
|
||||
default "7" if MPENTIUM4 || MPSC
|
||||
- default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
default "4" if MELAN || M486 || MGEODEGX1
|
||||
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
||||
|
||||
@@ -556,7 +563,7 @@ config X86_CMPXCHG64
|
||||
# generates cmov.
|
||||
config X86_CMOV
|
||||
def_bool y
|
||||
- depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
|
||||
config X86_MINIMUM_CPU_FAMILY
|
||||
int
|
||||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
|
||||
index 29eb64851528d79f0838cdeb73789d940090cad2..7204717ac8e210f1150073f80ccfe51ce83443fe 100644
|
||||
--- a/arch/x86/Makefile
|
||||
+++ b/arch/x86/Makefile
|
||||
@@ -130,6 +130,7 @@ else
|
||||
cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
|
||||
cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
|
||||
cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
|
||||
+ cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2)
|
||||
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
|
||||
|
||||
cflags-$(CONFIG_MCORE2) += \
|
||||
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
|
||||
index 14a6d19995cc89bec7a3c513c4e9f65678b37228..a4b8484d61da9286d10e1c07272b585268f93067 100644
|
||||
--- a/arch/x86/Makefile_32.cpu
|
||||
+++ b/arch/x86/Makefile_32.cpu
|
||||
@@ -35,6 +35,7 @@ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
|
||||
cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
|
||||
cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
|
||||
cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2,-march=athlon)
|
||||
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
|
||||
diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h
|
||||
index 44b776297dc3264a2f1241d13bb0f37021f97f13..630aa88f7de38fac27cf164d655c9202bde467ae 100644
|
||||
--- a/arch/x86/include/asm/module.h
|
||||
+++ b/arch/x86/include/asm/module.h
|
||||
@@ -87,6 +87,8 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "EXCAVATOR "
|
||||
#elif defined CONFIG_MZEN
|
||||
#define MODULE_PROC_FAMILY "ZEN "
|
||||
+#elif defined CONFIG_MZEN2
|
||||
+#define MODULE_PROC_FAMILY "ZEN2 "
|
||||
#elif defined CONFIG_MELAN
|
||||
#define MODULE_PROC_FAMILY "ELAN "
|
||||
#elif defined CONFIG_MCRUSOE
|
||||
|
||||
diff --git a/fs/dcache.c b/fs/dcache.c
|
||||
index 2acfc69878f5..3f1131431e06 100644
|
||||
--- a/fs/dcache.c
|
||||
|
||||
@ -89,7 +89,7 @@ pkgname=("${pkgbase}" "${pkgbase}-headers")
|
||||
_basekernel=5.6
|
||||
_sub=19
|
||||
pkgver="${_basekernel}"."${_sub}"
|
||||
pkgrel=36
|
||||
pkgrel=37
|
||||
pkgdesc='Linux-tkg'
|
||||
arch=('x86_64') # no i686 in here
|
||||
url="http://www.kernel.org/"
|
||||
@ -99,6 +99,7 @@ optdepends=('schedtool')
|
||||
options=('!strip')
|
||||
source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.xz"
|
||||
"https://www.kernel.org/pub/linux/kernel/v5.x/patch-${pkgver}.xz"
|
||||
"https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.5-v5.6.patch"
|
||||
'config.x86_64' # stock Arch config - https://www.archlinux.org/packages/core/x86_64/linux/
|
||||
'config_hardened.x86_64' # hardened Arch config - https://www.archlinux.org/packages/extra/x86_64/linux-hardened/
|
||||
90-cleanup.hook
|
||||
@ -126,13 +127,14 @@ source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.x
|
||||
)
|
||||
sha256sums=('e342b04a2aa63808ea0ef1baab28fc520bd031ef8cf93d9ee4a31d4058fcb622'
|
||||
'523e014b8432252f9739216e63811e60e6f8da5318122ec880c24d752a493e0f'
|
||||
'54923e20c2cdbb2dfe6d32b39abc019c68eac6b728950670a0e279c2d43e028e'
|
||||
'6ac452e2124f92747a57c5a50e11ca2f1e8112669845b4431311545c7fd2a36c'
|
||||
'116c8bee112e4bbf65fb7ef4770a24ed8e4d17dbb9d6d7911fa7b8cf13c1b086'
|
||||
'1e15fc2ef3fa770217ecc63a220e5df2ddbcf3295eb4a021171e7edd4c6cc898'
|
||||
'66a03c246037451a77b4d448565b1d7e9368270c7d02872fbd0b5d024ed0a997'
|
||||
'31dc68e84aecfb7d069efb1305049122c65694676be8b955634abcf0675922a2'
|
||||
'd02bf5ca08fd610394b9d3a0c3b176d74af206f897dee826e5cbaec97bb4a4aa'
|
||||
'6858fe0c55cda404f30f63824c7fcf970339c2d62a7f366a115f7ff9b87098c5'
|
||||
'2b210ce8efff012c803177dbf766e60df874e55ed78ff7a1d8540c33aec6864e'
|
||||
'7058e57fd68367b029adc77f2a82928f1433daaf02c8c279cb2d13556c8804d7'
|
||||
'c605f638d74c61861ebdc36ebd4cb8b6475eae2f6273e1ccb2bbb3e10a2ec3fe'
|
||||
'bc69d6e5ee8172b0242c8fa72d13cfe2b8d2b6601468836908a7dfe8b78a3bbb'
|
||||
@ -223,9 +225,15 @@ prepare() {
|
||||
patch -Np1 -i ../0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch
|
||||
fi
|
||||
|
||||
# graysky's cpu opts - https://github.com/graysky2/kernel_gcc_patch
|
||||
msg2 "Applying graysky's cpu opts patch"
|
||||
patch -Np1 -i ../enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.5-v5.6.patch
|
||||
|
||||
# TkG
|
||||
msg2 "Applying clear linux patches"
|
||||
patch -Np1 -i ../0002-clear-patches.patch
|
||||
|
||||
msg2 "Applying glitched base patch"
|
||||
patch -Np1 -i ../0003-glitched-base.patch
|
||||
|
||||
if [ "${_cpusched}" == "MuQSS" ]; then
|
||||
@ -309,6 +317,8 @@ prepare() {
|
||||
echo "# CONFIG_MGOLDMONT is not set" >> ./.config
|
||||
echo "# CONFIG_MGOLDMONTPLUS is not set" >> ./.config
|
||||
echo "# CONFIG_MCASCADELAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MCOOPERLAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MTIGERLAKE is not set" >> ./.config
|
||||
|
||||
# Disable some debugging
|
||||
if [ "${_debugdisable}" == "true" ]; then
|
||||
@ -499,6 +509,10 @@ prepare() {
|
||||
sed -i -e 's/# CONFIG_MGOLDMONTPLUS is not set/CONFIG_MGOLDMONTPLUS=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cascadelake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCASCADELAKE is not set/CONFIG_MCASCADELAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cooperlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCOOPERLAKE is not set/CONFIG_MCOOPERLAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "tigerlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MTIGERLAKE is not set/CONFIG_MTIGERLAKE=y/' ./.config
|
||||
fi
|
||||
|
||||
# irq threading
|
||||
|
||||
@ -19,7 +19,7 @@ If you want to streamline your kernel config for lower footprint and faster comp
|
||||
You can enable support for it at the beginning of the PKGBUILD file. Make sure to read everything you need to know about it.
|
||||
|
||||
## Other stuff included:
|
||||
- Per-CPU-arch native optimizations
|
||||
- Graysky's per-CPU-arch native optimizations - https://github.com/graysky2/kernel_gcc_patch
|
||||
- memory management and swapping tweaks
|
||||
- scheduling tweaks
|
||||
- using prefered raid6 gen function directly
|
||||
|
||||
@ -107,7 +107,7 @@ _compileroptlevel="1"
|
||||
|
||||
# CPU compiler optimizations - Defaults to generic optimizations if left empty
|
||||
# AMD CPUs : "k8" "k8sse3" "k10" "barcelona" "bobcat" "jaguar" "bulldozer" "piledriver" "steamroller" "excavator" "zen" "zen2"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake" "cooperlake" "tigerlake"
|
||||
# Other options :
|
||||
# - "generic" (to share the package between machines with different CPUs)
|
||||
# - "native" (use compiler autodetection and will prompt for P6_NOPS - Selecting your arch manually in the list above is recommended instead of this option)
|
||||
|
||||
@ -18,571 +18,6 @@ index 87f1fc9..b3be470 100755
|
||||
if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi
|
||||
UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP"
|
||||
|
||||
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
|
||||
index af9c967782f6..bf07a8c0f495 100644
|
||||
--- a/arch/x86/Kconfig.cpu
|
||||
+++ b/arch/x86/Kconfig.cpu
|
||||
@@ -123,6 +123,7 @@ config MPENTIUMM
|
||||
config MPENTIUM4
|
||||
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
|
||||
depends on X86_32
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
Select this for Intel Pentium 4 chips. This includes the
|
||||
Pentium 4, Pentium D, P4-based Celeron and Xeon, and
|
||||
@@ -155,9 +156,8 @@ config MPENTIUM4
|
||||
-Paxville
|
||||
-Dempsey
|
||||
|
||||
-
|
||||
config MK6
|
||||
- bool "K6/K6-II/K6-III"
|
||||
+ bool "AMD K6/K6-II/K6-III"
|
||||
depends on X86_32
|
||||
---help---
|
||||
Select this for an AMD K6-family processor. Enables use of
|
||||
@@ -165,7 +165,7 @@ config MK6
|
||||
flags to GCC.
|
||||
|
||||
config MK7
|
||||
- bool "Athlon/Duron/K7"
|
||||
+ bool "AMD Athlon/Duron/K7"
|
||||
depends on X86_32
|
||||
---help---
|
||||
Select this for an AMD Athlon K7-family processor. Enables use of
|
||||
@@ -173,12 +173,90 @@ config MK7
|
||||
flags to GCC.
|
||||
|
||||
config MK8
|
||||
- bool "Opteron/Athlon64/Hammer/K8"
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8"
|
||||
---help---
|
||||
Select this for an AMD Opteron or Athlon64 Hammer-family processor.
|
||||
Enables use of some extended instructions, and passes appropriate
|
||||
optimization flags to GCC.
|
||||
|
||||
+config MK8SSE3
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
|
||||
+ ---help---
|
||||
+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MK10
|
||||
+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
|
||||
+ ---help---
|
||||
+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
|
||||
+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MBARCELONA
|
||||
+ bool "AMD Barcelona"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 10h Barcelona processors.
|
||||
+
|
||||
+ Enables -march=barcelona
|
||||
+
|
||||
+config MBOBCAT
|
||||
+ bool "AMD Bobcat"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 14h Bobcat processors.
|
||||
+
|
||||
+ Enables -march=btver1
|
||||
+
|
||||
+config MJAGUAR
|
||||
+ bool "AMD Jaguar"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 16h Jaguar processors.
|
||||
+
|
||||
+ Enables -march=btver2
|
||||
+
|
||||
+config MBULLDOZER
|
||||
+ bool "AMD Bulldozer"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Bulldozer processors.
|
||||
+
|
||||
+ Enables -march=bdver1
|
||||
+
|
||||
+config MPILEDRIVER
|
||||
+ bool "AMD Piledriver"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Piledriver processors.
|
||||
+
|
||||
+ Enables -march=bdver2
|
||||
+
|
||||
+config MSTEAMROLLER
|
||||
+ bool "AMD Steamroller"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Steamroller processors.
|
||||
+
|
||||
+ Enables -march=bdver3
|
||||
+
|
||||
+config MEXCAVATOR
|
||||
+ bool "AMD Excavator"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Excavator processors.
|
||||
+
|
||||
+ Enables -march=bdver4
|
||||
+
|
||||
+config MZEN
|
||||
+ bool "AMD Zen"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 17h Zen processors.
|
||||
+
|
||||
+ Enables -march=znver1
|
||||
+
|
||||
+config MZEN2
|
||||
+ bool "AMD Zen 2"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 17h Zen 2 processors.
|
||||
+
|
||||
+ Enables -march=znver2
|
||||
+
|
||||
config MCRUSOE
|
||||
bool "Crusoe"
|
||||
depends on X86_32
|
||||
@@ -260,6 +338,7 @@ config MVIAC7
|
||||
|
||||
config MPSC
|
||||
bool "Intel P4 / older Netburst based Xeon"
|
||||
+ select X86_P6_NOP
|
||||
depends on X86_64
|
||||
---help---
|
||||
Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
|
||||
@@ -269,8 +348,19 @@ config MPSC
|
||||
using the cpu family field
|
||||
in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
|
||||
|
||||
+config MATOM
|
||||
+ bool "Intel Atom"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
+ in-order pipelining architecture and thus can benefit from
|
||||
+ accordingly optimized code. Use a recent GCC with specific Atom
|
||||
+ support in order to fully benefit from selecting this option.
|
||||
+
|
||||
config MCORE2
|
||||
- bool "Core 2/newer Xeon"
|
||||
+ bool "Intel Core 2"
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
|
||||
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
|
||||
@@ -278,14 +368,133 @@ config MCORE2
|
||||
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
|
||||
(not a typo)
|
||||
|
||||
-config MATOM
|
||||
- bool "Intel Atom"
|
||||
+ Enables -march=core2
|
||||
+
|
||||
+config MNEHALEM
|
||||
+ bool "Intel Nehalem"
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
|
||||
- Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
- in-order pipelining architecture and thus can benefit from
|
||||
- accordingly optimized code. Use a recent GCC with specific Atom
|
||||
- support in order to fully benefit from selecting this option.
|
||||
+ Select this for 1st Gen Core processors in the Nehalem family.
|
||||
+
|
||||
+ Enables -march=nehalem
|
||||
+
|
||||
+config MWESTMERE
|
||||
+ bool "Intel Westmere"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Westmere formerly Nehalem-C family.
|
||||
+
|
||||
+ Enables -march=westmere
|
||||
+
|
||||
+config MSILVERMONT
|
||||
+ bool "Intel Silvermont"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Silvermont platform.
|
||||
+
|
||||
+ Enables -march=silvermont
|
||||
+
|
||||
+config MGOLDMONT
|
||||
+ bool "Intel Goldmont"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Goldmont platform including Apollo Lake and Denverton.
|
||||
+
|
||||
+ Enables -march=goldmont
|
||||
+
|
||||
+config MGOLDMONTPLUS
|
||||
+ bool "Intel Goldmont Plus"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Goldmont Plus platform including Gemini Lake.
|
||||
+
|
||||
+ Enables -march=goldmont-plus
|
||||
+
|
||||
+config MSANDYBRIDGE
|
||||
+ bool "Intel Sandy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
|
||||
+
|
||||
+ Enables -march=sandybridge
|
||||
+
|
||||
+config MIVYBRIDGE
|
||||
+ bool "Intel Ivy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
|
||||
+
|
||||
+ Enables -march=ivybridge
|
||||
+
|
||||
+config MHASWELL
|
||||
+ bool "Intel Haswell"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 4th Gen Core processors in the Haswell family.
|
||||
+
|
||||
+ Enables -march=haswell
|
||||
+
|
||||
+config MBROADWELL
|
||||
+ bool "Intel Broadwell"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 5th Gen Core processors in the Broadwell family.
|
||||
+
|
||||
+ Enables -march=broadwell
|
||||
+
|
||||
+config MSKYLAKE
|
||||
+ bool "Intel Skylake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake family.
|
||||
+
|
||||
+ Enables -march=skylake
|
||||
+
|
||||
+config MSKYLAKEX
|
||||
+ bool "Intel Skylake X"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake X family.
|
||||
+
|
||||
+ Enables -march=skylake-avx512
|
||||
+
|
||||
+config MCANNONLAKE
|
||||
+ bool "Intel Cannon Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 8th Gen Core processors
|
||||
+
|
||||
+ Enables -march=cannonlake
|
||||
+
|
||||
+config MICELAKE
|
||||
+ bool "Intel Ice Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 10th Gen Core processors in the Ice Lake family.
|
||||
+
|
||||
+ Enables -march=icelake-client
|
||||
+
|
||||
+config MCASCADELAKE
|
||||
+ bool "Intel Cascade Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for Xeon processors in the Cascade Lake family.
|
||||
+
|
||||
+ Enables -march=cascadelake
|
||||
|
||||
config GENERIC_CPU
|
||||
bool "Generic-x86-64"
|
||||
@@ -294,6 +503,19 @@ config GENERIC_CPU
|
||||
Generic x86-64 CPU.
|
||||
Run equally well on all x86-64 CPUs.
|
||||
|
||||
+config MNATIVE
|
||||
+ bool "Native optimizations autodetected by GCC"
|
||||
+ ---help---
|
||||
+
|
||||
+ GCC 4.2 and above support -march=native, which automatically detects
|
||||
+ the optimum settings to use based on your processor. -march=native
|
||||
+ also detects and applies additional settings beyond -march specific
|
||||
+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
|
||||
+ (e.g. distcc cross-compiling), you should probably be using
|
||||
+ -march=native rather than anything listed below.
|
||||
+
|
||||
+ Enables -march=native
|
||||
+
|
||||
endchoice
|
||||
|
||||
config X86_GENERIC
|
||||
@@ -318,7 +540,7 @@ config X86_INTERNODE_CACHE_SHIFT
|
||||
config X86_L1_CACHE_SHIFT
|
||||
int
|
||||
default "7" if MPENTIUM4 || MPSC
|
||||
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
default "4" if MELAN || M486SX || M486 || MGEODEGX1
|
||||
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
||||
|
||||
@@ -336,35 +558,36 @@ config X86_ALIGNMENT_16
|
||||
|
||||
config X86_INTEL_USERCOPY
|
||||
def_bool y
|
||||
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
|
||||
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE
|
||||
|
||||
config X86_USE_PPRO_CHECKSUM
|
||||
def_bool y
|
||||
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
|
||||
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MATOM || MNATIVE
|
||||
|
||||
config X86_USE_3DNOW
|
||||
def_bool y
|
||||
depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
|
||||
|
||||
-#
|
||||
-# P6_NOPs are a relatively minor optimization that require a family >=
|
||||
-# 6 processor, except that it is broken on certain VIA chips.
|
||||
-# Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
-# (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
-# does not understand them.
|
||||
-#
|
||||
-# As a result, disallow these if we're not compiling for X86_64 (these
|
||||
-# NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
-# the right-hand clause are the cores that benefit from this optimization.
|
||||
-#
|
||||
config X86_P6_NOP
|
||||
- def_bool y
|
||||
- depends on X86_64
|
||||
- depends on (MCORE2 || MPENTIUM4 || MPSC)
|
||||
+ default n
|
||||
+ bool "Support for P6_NOPs on Intel chips"
|
||||
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE)
|
||||
+ ---help---
|
||||
+ P6_NOPs are a relatively minor optimization that require a family >=
|
||||
+ 6 processor, except that it is broken on certain VIA chips.
|
||||
+ Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
+ (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
+ does not understand them.
|
||||
+
|
||||
+ As a result, disallow these if we're not compiling for X86_64 (these
|
||||
+ NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
+ the right-hand clause are the cores that benefit from this optimization.
|
||||
+
|
||||
+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
|
||||
|
||||
config X86_TSC
|
||||
def_bool y
|
||||
- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
|
||||
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM) || X86_64
|
||||
|
||||
config X86_CMPXCHG64
|
||||
def_bool y
|
||||
@@ -374,7 +597,7 @@ config X86_CMPXCHG64
|
||||
# generates cmov.
|
||||
config X86_CMOV
|
||||
def_bool y
|
||||
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
|
||||
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
|
||||
config X86_MINIMUM_CPU_FAMILY
|
||||
int
|
||||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
|
||||
index 94df0868804b..dcbed7e3a070 100644
|
||||
--- a/arch/x86/Makefile
|
||||
+++ b/arch/x86/Makefile
|
||||
@@ -119,13 +119,53 @@ else
|
||||
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
|
||||
|
||||
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
|
||||
+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
|
||||
+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
|
||||
+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
|
||||
+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
|
||||
+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
|
||||
+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
|
||||
+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
|
||||
+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
|
||||
+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
|
||||
+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
|
||||
+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
|
||||
+ cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2)
|
||||
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
|
||||
|
||||
cflags-$(CONFIG_MCORE2) += \
|
||||
- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
|
||||
- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
|
||||
+ cflags-$(CONFIG_MNEHALEM) += \
|
||||
+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
|
||||
+ cflags-$(CONFIG_MWESTMERE) += \
|
||||
+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
|
||||
+ cflags-$(CONFIG_MSILVERMONT) += \
|
||||
+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
|
||||
+ cflags-$(CONFIG_MGOLDMONT) += \
|
||||
+ $(call cc-option,-march=goldmont,$(call cc-option,-mtune=goldmont))
|
||||
+ cflags-$(CONFIG_MGOLDMONTPLUS) += \
|
||||
+ $(call cc-option,-march=goldmont-plus,$(call cc-option,-mtune=goldmont-plus))
|
||||
+ cflags-$(CONFIG_MSANDYBRIDGE) += \
|
||||
+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
|
||||
+ cflags-$(CONFIG_MIVYBRIDGE) += \
|
||||
+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
|
||||
+ cflags-$(CONFIG_MHASWELL) += \
|
||||
+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
|
||||
+ cflags-$(CONFIG_MBROADWELL) += \
|
||||
+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
|
||||
+ cflags-$(CONFIG_MSKYLAKE) += \
|
||||
+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
|
||||
+ cflags-$(CONFIG_MSKYLAKEX) += \
|
||||
+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
|
||||
+ cflags-$(CONFIG_MCANNONLAKE) += \
|
||||
+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
|
||||
+ cflags-$(CONFIG_MICELAKE) += \
|
||||
+ $(call cc-option,-march=icelake-client,$(call cc-option,-mtune=icelake-client))
|
||||
+ cflags-$(CONFIG_MCASCADELAKE) += \
|
||||
+ $(call cc-option,-march=cascadelake,$(call cc-option,-mtune=cascadelake))
|
||||
+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
|
||||
KBUILD_CFLAGS += $(cflags-y)
|
||||
|
||||
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
|
||||
index cd3056759880..2c81838df533 100644
|
||||
--- a/arch/x86/Makefile_32.cpu
|
||||
+++ b/arch/x86/Makefile_32.cpu
|
||||
@@ -24,7 +24,19 @@ cflags-$(CONFIG_MK6) += -march=k6
|
||||
# Please note, that patches that add -march=athlon-xp and friends are pointless.
|
||||
# They make zero difference whatsosever to performance at this time.
|
||||
cflags-$(CONFIG_MK7) += -march=athlon
|
||||
+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
|
||||
+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
|
||||
+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
|
||||
+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
|
||||
+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
|
||||
+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2,-march=athlon)
|
||||
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
|
||||
@@ -33,8 +45,22 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) -falign-fu
|
||||
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
|
||||
cflags-$(CONFIG_MVIAC7) += -march=i686
|
||||
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
|
||||
-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
|
||||
+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
|
||||
+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
|
||||
+cflags-$(CONFIG_MGOLDMONT) += -march=i686 $(call tune,goldmont)
|
||||
+cflags-$(CONFIG_MGOLDMONTPLUS) += -march=i686 $(call tune,goldmont-plus)
|
||||
+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
|
||||
+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
|
||||
+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
|
||||
+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
|
||||
+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
|
||||
+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
|
||||
+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
|
||||
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake-client)
|
||||
+cflags-$(CONFIG_MCASCADELAKE) += -march=i686 $(call tune,cascadelake)
|
||||
+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
|
||||
# AMD Elan support
|
||||
cflags-$(CONFIG_MELAN) += -march=i486
|
||||
diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h
|
||||
index c215d2762488..a4fddfe3d4fb 100644
|
||||
--- a/arch/x86/include/asm/module.h
|
||||
+++ b/arch/x86/include/asm/module.h
|
||||
@@ -27,6 +27,36 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "586MMX "
|
||||
#elif defined CONFIG_MCORE2
|
||||
#define MODULE_PROC_FAMILY "CORE2 "
|
||||
+#elif defined CONFIG_MNATIVE
|
||||
+#define MODULE_PROC_FAMILY "NATIVE "
|
||||
+#elif defined CONFIG_MNEHALEM
|
||||
+#define MODULE_PROC_FAMILY "NEHALEM "
|
||||
+#elif defined CONFIG_MWESTMERE
|
||||
+#define MODULE_PROC_FAMILY "WESTMERE "
|
||||
+#elif defined CONFIG_MSILVERMONT
|
||||
+#define MODULE_PROC_FAMILY "SILVERMONT "
|
||||
+#elif defined CONFIG_MGOLDMONT
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONT "
|
||||
+#elif defined CONFIG_MGOLDMONTPLUS
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONTPLUS "
|
||||
+#elif defined CONFIG_MSANDYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
|
||||
+#elif defined CONFIG_MIVYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "IVYBRIDGE "
|
||||
+#elif defined CONFIG_MHASWELL
|
||||
+#define MODULE_PROC_FAMILY "HASWELL "
|
||||
+#elif defined CONFIG_MBROADWELL
|
||||
+#define MODULE_PROC_FAMILY "BROADWELL "
|
||||
+#elif defined CONFIG_MSKYLAKE
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKE "
|
||||
+#elif defined CONFIG_MSKYLAKEX
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKEX "
|
||||
+#elif defined CONFIG_MCANNONLAKE
|
||||
+#define MODULE_PROC_FAMILY "CANNONLAKE "
|
||||
+#elif defined CONFIG_MICELAKE
|
||||
+#define MODULE_PROC_FAMILY "ICELAKE "
|
||||
+#elif defined CONFIG_MCASCADELAKE
|
||||
+#define MODULE_PROC_FAMILY "CASCADELAKE "
|
||||
#elif defined CONFIG_MATOM
|
||||
#define MODULE_PROC_FAMILY "ATOM "
|
||||
#elif defined CONFIG_M686
|
||||
@@ -45,6 +75,28 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "K7 "
|
||||
#elif defined CONFIG_MK8
|
||||
#define MODULE_PROC_FAMILY "K8 "
|
||||
+#elif defined CONFIG_MK8SSE3
|
||||
+#define MODULE_PROC_FAMILY "K8SSE3 "
|
||||
+#elif defined CONFIG_MK10
|
||||
+#define MODULE_PROC_FAMILY "K10 "
|
||||
+#elif defined CONFIG_MBARCELONA
|
||||
+#define MODULE_PROC_FAMILY "BARCELONA "
|
||||
+#elif defined CONFIG_MBOBCAT
|
||||
+#define MODULE_PROC_FAMILY "BOBCAT "
|
||||
+#elif defined CONFIG_MBULLDOZER
|
||||
+#define MODULE_PROC_FAMILY "BULLDOZER "
|
||||
+#elif defined CONFIG_MPILEDRIVER
|
||||
+#define MODULE_PROC_FAMILY "PILEDRIVER "
|
||||
+#elif defined CONFIG_MSTEAMROLLER
|
||||
+#define MODULE_PROC_FAMILY "STEAMROLLER "
|
||||
+#elif defined CONFIG_MJAGUAR
|
||||
+#define MODULE_PROC_FAMILY "JAGUAR "
|
||||
+#elif defined CONFIG_MEXCAVATOR
|
||||
+#define MODULE_PROC_FAMILY "EXCAVATOR "
|
||||
+#elif defined CONFIG_MZEN
|
||||
+#define MODULE_PROC_FAMILY "ZEN "
|
||||
+#elif defined CONFIG_MZEN2
|
||||
+#define MODULE_PROC_FAMILY "ZEN2 "
|
||||
#elif defined CONFIG_MELAN
|
||||
#define MODULE_PROC_FAMILY "ELAN "
|
||||
#elif defined CONFIG_MCRUSOE
|
||||
diff --git a/fs/dcache.c b/fs/dcache.c
|
||||
index 2acfc69878f5..3f1131431e06 100644
|
||||
--- a/fs/dcache.c
|
||||
|
||||
@ -89,7 +89,7 @@ pkgname=("${pkgbase}" "${pkgbase}-headers")
|
||||
_basekernel=5.7
|
||||
_sub=5
|
||||
pkgver="${_basekernel}"."${_sub}"
|
||||
pkgrel=9
|
||||
pkgrel=10
|
||||
pkgdesc='Linux-tkg'
|
||||
arch=('x86_64') # no i686 in here
|
||||
url="http://www.kernel.org/"
|
||||
@ -99,6 +99,7 @@ optdepends=('schedtool')
|
||||
options=('!strip')
|
||||
source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.xz"
|
||||
"https://www.kernel.org/pub/linux/kernel/v5.x/patch-${pkgver}.xz"
|
||||
"https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.7%2B.patch"
|
||||
'config.x86_64' # stock Arch config
|
||||
#'config_hardened.x86_64' # hardened Arch config
|
||||
90-cleanup.hook
|
||||
@ -126,12 +127,13 @@ source=("https://www.kernel.org/pub/linux/kernel/v5.x/linux-${_basekernel}.tar.x
|
||||
)
|
||||
sha256sums=('de8163bb62f822d84f7a3983574ec460060bf013a78ff79cd7c979ff1ec1d7e0'
|
||||
'9de52574c9274f340ce649a9520695b21fa9b9465d48b70982b594e4e334ed09'
|
||||
'1f56a2466bd9b4477925682d8f944fabb38727140e246733214fe50aa326fc47'
|
||||
'71030461a03fe30133f357001394ca2644c5fe0aae52161fe00c74aec0f900fe'
|
||||
'1e15fc2ef3fa770217ecc63a220e5df2ddbcf3295eb4a021171e7edd4c6cc898'
|
||||
'66a03c246037451a77b4d448565b1d7e9368270c7d02872fbd0b5d024ed0a997'
|
||||
'31dc68e84aecfb7d069efb1305049122c65694676be8b955634abcf0675922a2'
|
||||
'd02bf5ca08fd610394b9d3a0c3b176d74af206f897dee826e5cbaec97bb4a4aa'
|
||||
'8352d688733b23472d10aa2fec3f604606fdeb957bc35f4851831a9b624556b8'
|
||||
'9eae36f2e3265b787592e64259bcd5a1de4a524a55b2eccb2e3121f1ff1c209f'
|
||||
'7058e57fd68367b029adc77f2a82928f1433daaf02c8c279cb2d13556c8804d7'
|
||||
'c605f638d74c61861ebdc36ebd4cb8b6475eae2f6273e1ccb2bbb3e10a2ec3fe'
|
||||
'bc69d6e5ee8172b0242c8fa72d13cfe2b8d2b6601468836908a7dfe8b78a3bbb'
|
||||
@ -221,9 +223,15 @@ prepare() {
|
||||
patch -Np1 -i ../0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch
|
||||
fi
|
||||
|
||||
# graysky's cpu opts - https://github.com/graysky2/kernel_gcc_patch
|
||||
msg2 "Applying graysky's cpu opts patch"
|
||||
patch -Np1 -i ../enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.7%2B.patch
|
||||
|
||||
# TkG
|
||||
msg2 "Applying clear linux patches"
|
||||
patch -Np1 -i ../0002-clear-patches.patch
|
||||
|
||||
msg2 "Applying glitched base patch"
|
||||
patch -Np1 -i ../0003-glitched-base.patch
|
||||
|
||||
if [ "${_cpusched}" == "MuQSS" ]; then
|
||||
@ -309,6 +317,8 @@ prepare() {
|
||||
echo "# CONFIG_MGOLDMONT is not set" >> ./.config
|
||||
echo "# CONFIG_MGOLDMONTPLUS is not set" >> ./.config
|
||||
echo "# CONFIG_MCASCADELAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MCOOPERLAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MTIGERLAKE is not set" >> ./.config
|
||||
|
||||
# Disable some debugging
|
||||
if [ "${_debugdisable}" == "true" ]; then
|
||||
@ -499,6 +509,10 @@ prepare() {
|
||||
sed -i -e 's/# CONFIG_MGOLDMONTPLUS is not set/CONFIG_MGOLDMONTPLUS=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cascadelake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCASCADELAKE is not set/CONFIG_MCASCADELAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cooperlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCOOPERLAKE is not set/CONFIG_MCOOPERLAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "tigerlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MTIGERLAKE is not set/CONFIG_MTIGERLAKE=y/' ./.config
|
||||
fi
|
||||
|
||||
# irq threading
|
||||
|
||||
@ -19,7 +19,7 @@ If you want to streamline your kernel config for lower footprint and faster comp
|
||||
You can enable support for it at the beginning of the PKGBUILD file. Make sure to read everything you need to know about it.
|
||||
|
||||
## Other stuff included:
|
||||
- Per-CPU-arch native optimizations
|
||||
- Graysky's per-CPU-arch native optimizations - https://github.com/graysky2/kernel_gcc_patch
|
||||
- memory management and swapping tweaks
|
||||
- scheduling tweaks
|
||||
- optional "Zenify" patchset using core blk, mm and scheduler tweaks from Zen
|
||||
|
||||
@ -107,7 +107,7 @@ _compileroptlevel="1"
|
||||
|
||||
# CPU compiler optimizations - Defaults to generic optimizations if left empty
|
||||
# AMD CPUs : "k8" "k8sse3" "k10" "barcelona" "bobcat" "jaguar" "bulldozer" "piledriver" "steamroller" "excavator" "zen" "zen2"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake" "cooperlake" "tigerlake"
|
||||
# Other options :
|
||||
# - "generic" (to share the package between machines with different CPUs)
|
||||
# - "native" (use compiler autodetection and will prompt for P6_NOPS - Selecting your arch manually in the list above is recommended instead of this option)
|
||||
|
||||
@ -18,571 +18,6 @@ index 87f1fc9..b3be470 100755
|
||||
if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi
|
||||
UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP"
|
||||
|
||||
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
|
||||
index af9c967782f6..bf07a8c0f495 100644
|
||||
--- a/arch/x86/Kconfig.cpu
|
||||
+++ b/arch/x86/Kconfig.cpu
|
||||
@@ -123,6 +123,7 @@ config MPENTIUMM
|
||||
config MPENTIUM4
|
||||
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
|
||||
depends on X86_32
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
Select this for Intel Pentium 4 chips. This includes the
|
||||
Pentium 4, Pentium D, P4-based Celeron and Xeon, and
|
||||
@@ -155,9 +156,8 @@ config MPENTIUM4
|
||||
-Paxville
|
||||
-Dempsey
|
||||
|
||||
-
|
||||
config MK6
|
||||
- bool "K6/K6-II/K6-III"
|
||||
+ bool "AMD K6/K6-II/K6-III"
|
||||
depends on X86_32
|
||||
---help---
|
||||
Select this for an AMD K6-family processor. Enables use of
|
||||
@@ -165,7 +165,7 @@ config MK6
|
||||
flags to GCC.
|
||||
|
||||
config MK7
|
||||
- bool "Athlon/Duron/K7"
|
||||
+ bool "AMD Athlon/Duron/K7"
|
||||
depends on X86_32
|
||||
---help---
|
||||
Select this for an AMD Athlon K7-family processor. Enables use of
|
||||
@@ -173,12 +173,90 @@ config MK7
|
||||
flags to GCC.
|
||||
|
||||
config MK8
|
||||
- bool "Opteron/Athlon64/Hammer/K8"
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8"
|
||||
---help---
|
||||
Select this for an AMD Opteron or Athlon64 Hammer-family processor.
|
||||
Enables use of some extended instructions, and passes appropriate
|
||||
optimization flags to GCC.
|
||||
|
||||
+config MK8SSE3
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
|
||||
+ ---help---
|
||||
+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MK10
|
||||
+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
|
||||
+ ---help---
|
||||
+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
|
||||
+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MBARCELONA
|
||||
+ bool "AMD Barcelona"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 10h Barcelona processors.
|
||||
+
|
||||
+ Enables -march=barcelona
|
||||
+
|
||||
+config MBOBCAT
|
||||
+ bool "AMD Bobcat"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 14h Bobcat processors.
|
||||
+
|
||||
+ Enables -march=btver1
|
||||
+
|
||||
+config MJAGUAR
|
||||
+ bool "AMD Jaguar"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 16h Jaguar processors.
|
||||
+
|
||||
+ Enables -march=btver2
|
||||
+
|
||||
+config MBULLDOZER
|
||||
+ bool "AMD Bulldozer"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Bulldozer processors.
|
||||
+
|
||||
+ Enables -march=bdver1
|
||||
+
|
||||
+config MPILEDRIVER
|
||||
+ bool "AMD Piledriver"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Piledriver processors.
|
||||
+
|
||||
+ Enables -march=bdver2
|
||||
+
|
||||
+config MSTEAMROLLER
|
||||
+ bool "AMD Steamroller"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Steamroller processors.
|
||||
+
|
||||
+ Enables -march=bdver3
|
||||
+
|
||||
+config MEXCAVATOR
|
||||
+ bool "AMD Excavator"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 15h Excavator processors.
|
||||
+
|
||||
+ Enables -march=bdver4
|
||||
+
|
||||
+config MZEN
|
||||
+ bool "AMD Zen"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 17h Zen processors.
|
||||
+
|
||||
+ Enables -march=znver1
|
||||
+
|
||||
+config MZEN2
|
||||
+ bool "AMD Zen 2"
|
||||
+ ---help---
|
||||
+ Select this for AMD Family 17h Zen 2 processors.
|
||||
+
|
||||
+ Enables -march=znver2
|
||||
+
|
||||
config MCRUSOE
|
||||
bool "Crusoe"
|
||||
depends on X86_32
|
||||
@@ -260,6 +338,7 @@ config MVIAC7
|
||||
|
||||
config MPSC
|
||||
bool "Intel P4 / older Netburst based Xeon"
|
||||
+ select X86_P6_NOP
|
||||
depends on X86_64
|
||||
---help---
|
||||
Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
|
||||
@@ -269,8 +348,19 @@ config MPSC
|
||||
using the cpu family field
|
||||
in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
|
||||
|
||||
+config MATOM
|
||||
+ bool "Intel Atom"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
+ in-order pipelining architecture and thus can benefit from
|
||||
+ accordingly optimized code. Use a recent GCC with specific Atom
|
||||
+ support in order to fully benefit from selecting this option.
|
||||
+
|
||||
config MCORE2
|
||||
- bool "Core 2/newer Xeon"
|
||||
+ bool "Intel Core 2"
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
|
||||
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
|
||||
@@ -278,14 +368,133 @@ config MCORE2
|
||||
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
|
||||
(not a typo)
|
||||
|
||||
-config MATOM
|
||||
- bool "Intel Atom"
|
||||
+ Enables -march=core2
|
||||
+
|
||||
+config MNEHALEM
|
||||
+ bool "Intel Nehalem"
|
||||
+ select X86_P6_NOP
|
||||
---help---
|
||||
|
||||
- Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
- in-order pipelining architecture and thus can benefit from
|
||||
- accordingly optimized code. Use a recent GCC with specific Atom
|
||||
- support in order to fully benefit from selecting this option.
|
||||
+ Select this for 1st Gen Core processors in the Nehalem family.
|
||||
+
|
||||
+ Enables -march=nehalem
|
||||
+
|
||||
+config MWESTMERE
|
||||
+ bool "Intel Westmere"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Westmere formerly Nehalem-C family.
|
||||
+
|
||||
+ Enables -march=westmere
|
||||
+
|
||||
+config MSILVERMONT
|
||||
+ bool "Intel Silvermont"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Silvermont platform.
|
||||
+
|
||||
+ Enables -march=silvermont
|
||||
+
|
||||
+config MGOLDMONT
|
||||
+ bool "Intel Goldmont"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Goldmont platform including Apollo Lake and Denverton.
|
||||
+
|
||||
+ Enables -march=goldmont
|
||||
+
|
||||
+config MGOLDMONTPLUS
|
||||
+ bool "Intel Goldmont Plus"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for the Intel Goldmont Plus platform including Gemini Lake.
|
||||
+
|
||||
+ Enables -march=goldmont-plus
|
||||
+
|
||||
+config MSANDYBRIDGE
|
||||
+ bool "Intel Sandy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
|
||||
+
|
||||
+ Enables -march=sandybridge
|
||||
+
|
||||
+config MIVYBRIDGE
|
||||
+ bool "Intel Ivy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
|
||||
+
|
||||
+ Enables -march=ivybridge
|
||||
+
|
||||
+config MHASWELL
|
||||
+ bool "Intel Haswell"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 4th Gen Core processors in the Haswell family.
|
||||
+
|
||||
+ Enables -march=haswell
|
||||
+
|
||||
+config MBROADWELL
|
||||
+ bool "Intel Broadwell"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 5th Gen Core processors in the Broadwell family.
|
||||
+
|
||||
+ Enables -march=broadwell
|
||||
+
|
||||
+config MSKYLAKE
|
||||
+ bool "Intel Skylake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake family.
|
||||
+
|
||||
+ Enables -march=skylake
|
||||
+
|
||||
+config MSKYLAKEX
|
||||
+ bool "Intel Skylake X"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake X family.
|
||||
+
|
||||
+ Enables -march=skylake-avx512
|
||||
+
|
||||
+config MCANNONLAKE
|
||||
+ bool "Intel Cannon Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 8th Gen Core processors
|
||||
+
|
||||
+ Enables -march=cannonlake
|
||||
+
|
||||
+config MICELAKE
|
||||
+ bool "Intel Ice Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for 10th Gen Core processors in the Ice Lake family.
|
||||
+
|
||||
+ Enables -march=icelake-client
|
||||
+
|
||||
+config MCASCADELAKE
|
||||
+ bool "Intel Cascade Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ ---help---
|
||||
+
|
||||
+ Select this for Xeon processors in the Cascade Lake family.
|
||||
+
|
||||
+ Enables -march=cascadelake
|
||||
|
||||
config GENERIC_CPU
|
||||
bool "Generic-x86-64"
|
||||
@@ -294,6 +503,19 @@ config GENERIC_CPU
|
||||
Generic x86-64 CPU.
|
||||
Run equally well on all x86-64 CPUs.
|
||||
|
||||
+config MNATIVE
|
||||
+ bool "Native optimizations autodetected by GCC"
|
||||
+ ---help---
|
||||
+
|
||||
+ GCC 4.2 and above support -march=native, which automatically detects
|
||||
+ the optimum settings to use based on your processor. -march=native
|
||||
+ also detects and applies additional settings beyond -march specific
|
||||
+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
|
||||
+ (e.g. distcc cross-compiling), you should probably be using
|
||||
+ -march=native rather than anything listed below.
|
||||
+
|
||||
+ Enables -march=native
|
||||
+
|
||||
endchoice
|
||||
|
||||
config X86_GENERIC
|
||||
@@ -318,7 +540,7 @@ config X86_INTERNODE_CACHE_SHIFT
|
||||
config X86_L1_CACHE_SHIFT
|
||||
int
|
||||
default "7" if MPENTIUM4 || MPSC
|
||||
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
default "4" if MELAN || M486SX || M486 || MGEODEGX1
|
||||
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
||||
|
||||
@@ -336,35 +558,36 @@ config X86_ALIGNMENT_16
|
||||
|
||||
config X86_INTEL_USERCOPY
|
||||
def_bool y
|
||||
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
|
||||
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE
|
||||
|
||||
config X86_USE_PPRO_CHECKSUM
|
||||
def_bool y
|
||||
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
|
||||
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MATOM || MNATIVE
|
||||
|
||||
config X86_USE_3DNOW
|
||||
def_bool y
|
||||
depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
|
||||
|
||||
-#
|
||||
-# P6_NOPs are a relatively minor optimization that require a family >=
|
||||
-# 6 processor, except that it is broken on certain VIA chips.
|
||||
-# Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
-# (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
-# does not understand them.
|
||||
-#
|
||||
-# As a result, disallow these if we're not compiling for X86_64 (these
|
||||
-# NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
-# the right-hand clause are the cores that benefit from this optimization.
|
||||
-#
|
||||
config X86_P6_NOP
|
||||
- def_bool y
|
||||
- depends on X86_64
|
||||
- depends on (MCORE2 || MPENTIUM4 || MPSC)
|
||||
+ default n
|
||||
+ bool "Support for P6_NOPs on Intel chips"
|
||||
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE)
|
||||
+ ---help---
|
||||
+ P6_NOPs are a relatively minor optimization that require a family >=
|
||||
+ 6 processor, except that it is broken on certain VIA chips.
|
||||
+ Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
+ (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
+ does not understand them.
|
||||
+
|
||||
+ As a result, disallow these if we're not compiling for X86_64 (these
|
||||
+ NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
+ the right-hand clause are the cores that benefit from this optimization.
|
||||
+
|
||||
+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
|
||||
|
||||
config X86_TSC
|
||||
def_bool y
|
||||
- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
|
||||
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM) || X86_64
|
||||
|
||||
config X86_CMPXCHG64
|
||||
def_bool y
|
||||
@@ -374,7 +597,7 @@ config X86_CMPXCHG64
|
||||
# generates cmov.
|
||||
config X86_CMOV
|
||||
def_bool y
|
||||
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
|
||||
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
|
||||
config X86_MINIMUM_CPU_FAMILY
|
||||
int
|
||||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
|
||||
index 94df0868804b..dcbed7e3a070 100644
|
||||
--- a/arch/x86/Makefile
|
||||
+++ b/arch/x86/Makefile
|
||||
@@ -119,13 +119,53 @@ else
|
||||
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
|
||||
|
||||
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
|
||||
+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
|
||||
+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
|
||||
+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
|
||||
+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
|
||||
+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
|
||||
+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
|
||||
+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
|
||||
+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
|
||||
+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
|
||||
+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
|
||||
+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
|
||||
+ cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2)
|
||||
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
|
||||
|
||||
cflags-$(CONFIG_MCORE2) += \
|
||||
- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
|
||||
- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
|
||||
+ cflags-$(CONFIG_MNEHALEM) += \
|
||||
+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
|
||||
+ cflags-$(CONFIG_MWESTMERE) += \
|
||||
+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
|
||||
+ cflags-$(CONFIG_MSILVERMONT) += \
|
||||
+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
|
||||
+ cflags-$(CONFIG_MGOLDMONT) += \
|
||||
+ $(call cc-option,-march=goldmont,$(call cc-option,-mtune=goldmont))
|
||||
+ cflags-$(CONFIG_MGOLDMONTPLUS) += \
|
||||
+ $(call cc-option,-march=goldmont-plus,$(call cc-option,-mtune=goldmont-plus))
|
||||
+ cflags-$(CONFIG_MSANDYBRIDGE) += \
|
||||
+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
|
||||
+ cflags-$(CONFIG_MIVYBRIDGE) += \
|
||||
+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
|
||||
+ cflags-$(CONFIG_MHASWELL) += \
|
||||
+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
|
||||
+ cflags-$(CONFIG_MBROADWELL) += \
|
||||
+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
|
||||
+ cflags-$(CONFIG_MSKYLAKE) += \
|
||||
+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
|
||||
+ cflags-$(CONFIG_MSKYLAKEX) += \
|
||||
+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
|
||||
+ cflags-$(CONFIG_MCANNONLAKE) += \
|
||||
+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
|
||||
+ cflags-$(CONFIG_MICELAKE) += \
|
||||
+ $(call cc-option,-march=icelake-client,$(call cc-option,-mtune=icelake-client))
|
||||
+ cflags-$(CONFIG_MCASCADELAKE) += \
|
||||
+ $(call cc-option,-march=cascadelake,$(call cc-option,-mtune=cascadelake))
|
||||
+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
|
||||
KBUILD_CFLAGS += $(cflags-y)
|
||||
|
||||
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
|
||||
index cd3056759880..2c81838df533 100644
|
||||
--- a/arch/x86/Makefile_32.cpu
|
||||
+++ b/arch/x86/Makefile_32.cpu
|
||||
@@ -24,7 +24,19 @@ cflags-$(CONFIG_MK6) += -march=k6
|
||||
# Please note, that patches that add -march=athlon-xp and friends are pointless.
|
||||
# They make zero difference whatsosever to performance at this time.
|
||||
cflags-$(CONFIG_MK7) += -march=athlon
|
||||
+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
|
||||
+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
|
||||
+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
|
||||
+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
|
||||
+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
|
||||
+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2,-march=athlon)
|
||||
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
|
||||
@@ -33,8 +45,22 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) -falign-fu
|
||||
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
|
||||
cflags-$(CONFIG_MVIAC7) += -march=i686
|
||||
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
|
||||
-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
|
||||
+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
|
||||
+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
|
||||
+cflags-$(CONFIG_MGOLDMONT) += -march=i686 $(call tune,goldmont)
|
||||
+cflags-$(CONFIG_MGOLDMONTPLUS) += -march=i686 $(call tune,goldmont-plus)
|
||||
+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
|
||||
+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
|
||||
+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
|
||||
+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
|
||||
+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
|
||||
+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
|
||||
+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
|
||||
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake-client)
|
||||
+cflags-$(CONFIG_MCASCADELAKE) += -march=i686 $(call tune,cascadelake)
|
||||
+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
|
||||
# AMD Elan support
|
||||
cflags-$(CONFIG_MELAN) += -march=i486
|
||||
diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h
|
||||
index c215d2762488..a4fddfe3d4fb 100644
|
||||
--- a/arch/x86/include/asm/vermagic.h
|
||||
+++ b/arch/x86/include/asm/vermagic.h
|
||||
@@ -27,6 +27,36 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "586MMX "
|
||||
#elif defined CONFIG_MCORE2
|
||||
#define MODULE_PROC_FAMILY "CORE2 "
|
||||
+#elif defined CONFIG_MNATIVE
|
||||
+#define MODULE_PROC_FAMILY "NATIVE "
|
||||
+#elif defined CONFIG_MNEHALEM
|
||||
+#define MODULE_PROC_FAMILY "NEHALEM "
|
||||
+#elif defined CONFIG_MWESTMERE
|
||||
+#define MODULE_PROC_FAMILY "WESTMERE "
|
||||
+#elif defined CONFIG_MSILVERMONT
|
||||
+#define MODULE_PROC_FAMILY "SILVERMONT "
|
||||
+#elif defined CONFIG_MGOLDMONT
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONT "
|
||||
+#elif defined CONFIG_MGOLDMONTPLUS
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONTPLUS "
|
||||
+#elif defined CONFIG_MSANDYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
|
||||
+#elif defined CONFIG_MIVYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "IVYBRIDGE "
|
||||
+#elif defined CONFIG_MHASWELL
|
||||
+#define MODULE_PROC_FAMILY "HASWELL "
|
||||
+#elif defined CONFIG_MBROADWELL
|
||||
+#define MODULE_PROC_FAMILY "BROADWELL "
|
||||
+#elif defined CONFIG_MSKYLAKE
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKE "
|
||||
+#elif defined CONFIG_MSKYLAKEX
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKEX "
|
||||
+#elif defined CONFIG_MCANNONLAKE
|
||||
+#define MODULE_PROC_FAMILY "CANNONLAKE "
|
||||
+#elif defined CONFIG_MICELAKE
|
||||
+#define MODULE_PROC_FAMILY "ICELAKE "
|
||||
+#elif defined CONFIG_MCASCADELAKE
|
||||
+#define MODULE_PROC_FAMILY "CASCADELAKE "
|
||||
#elif defined CONFIG_MATOM
|
||||
#define MODULE_PROC_FAMILY "ATOM "
|
||||
#elif defined CONFIG_M686
|
||||
@@ -45,6 +75,28 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "K7 "
|
||||
#elif defined CONFIG_MK8
|
||||
#define MODULE_PROC_FAMILY "K8 "
|
||||
+#elif defined CONFIG_MK8SSE3
|
||||
+#define MODULE_PROC_FAMILY "K8SSE3 "
|
||||
+#elif defined CONFIG_MK10
|
||||
+#define MODULE_PROC_FAMILY "K10 "
|
||||
+#elif defined CONFIG_MBARCELONA
|
||||
+#define MODULE_PROC_FAMILY "BARCELONA "
|
||||
+#elif defined CONFIG_MBOBCAT
|
||||
+#define MODULE_PROC_FAMILY "BOBCAT "
|
||||
+#elif defined CONFIG_MBULLDOZER
|
||||
+#define MODULE_PROC_FAMILY "BULLDOZER "
|
||||
+#elif defined CONFIG_MPILEDRIVER
|
||||
+#define MODULE_PROC_FAMILY "PILEDRIVER "
|
||||
+#elif defined CONFIG_MSTEAMROLLER
|
||||
+#define MODULE_PROC_FAMILY "STEAMROLLER "
|
||||
+#elif defined CONFIG_MJAGUAR
|
||||
+#define MODULE_PROC_FAMILY "JAGUAR "
|
||||
+#elif defined CONFIG_MEXCAVATOR
|
||||
+#define MODULE_PROC_FAMILY "EXCAVATOR "
|
||||
+#elif defined CONFIG_MZEN
|
||||
+#define MODULE_PROC_FAMILY "ZEN "
|
||||
+#elif defined CONFIG_MZEN2
|
||||
+#define MODULE_PROC_FAMILY "ZEN2 "
|
||||
#elif defined CONFIG_MELAN
|
||||
#define MODULE_PROC_FAMILY "ELAN "
|
||||
#elif defined CONFIG_MCRUSOE
|
||||
diff --git a/fs/dcache.c b/fs/dcache.c
|
||||
index 2acfc69878f5..3f1131431e06 100644
|
||||
--- a/fs/dcache.c
|
||||
@ -641,287 +76,6 @@ Date: Mon, 3 Sep 2018 17:36:25 +0200
|
||||
Subject: Zenify & stuff
|
||||
|
||||
|
||||
diff --git a/Documentation/tp_smapi.txt b/Documentation/tp_smapi.txt
|
||||
new file mode 100644
|
||||
index 000000000000..a249678a8866
|
||||
--- /dev/null
|
||||
+++ b/Documentation/tp_smapi.txt
|
||||
@@ -0,0 +1,275 @@
|
||||
+tp_smapi version 0.42
|
||||
+IBM ThinkPad hardware functions driver
|
||||
+
|
||||
+Author: Shem Multinymous <multinymous@gmail.com>
|
||||
+Project: http://sourceforge.net/projects/tpctl
|
||||
+Wiki: http://thinkwiki.org/wiki/tp_smapi
|
||||
+List: linux-thinkpad@linux-thinkpad.org
|
||||
+ (http://mailman.linux-thinkpad.org/mailman/listinfo/linux-thinkpad)
|
||||
+
|
||||
+Description
|
||||
+-----------
|
||||
+
|
||||
+ThinkPad laptops include a proprietary interface called SMAPI BIOS
|
||||
+(System Management Application Program Interface) which provides some
|
||||
+hardware control functionality that is not accessible by other means.
|
||||
+
|
||||
+This driver exposes some features of the SMAPI BIOS through a sysfs
|
||||
+interface. It is suitable for newer models, on which SMAPI is invoked
|
||||
+through IO port writes. Older models use a different SMAPI interface;
|
||||
+for those, try the "thinkpad" module from the "tpctl" package.
|
||||
+
|
||||
+WARNING:
|
||||
+This driver uses undocumented features and direct hardware access.
|
||||
+It thus cannot be guaranteed to work, and may cause arbitrary damage
|
||||
+(especially on models it wasn't tested on).
|
||||
+
|
||||
+
|
||||
+Module parameters
|
||||
+-----------------
|
||||
+
|
||||
+thinkpad_ec module:
|
||||
+ force_io=1 lets thinkpad_ec load on some recent ThinkPad models
|
||||
+ (e.g., T400 and T500) whose BIOS's ACPI DSDT reserves the ports we need.
|
||||
+tp_smapi module:
|
||||
+ debug=1 enables verbose dmesg output.
|
||||
+
|
||||
+
|
||||
+Usage
|
||||
+-----
|
||||
+
|
||||
+Control of battery charging thresholds (in percents of current full charge
|
||||
+capacity):
|
||||
+
|
||||
+# echo 40 > /sys/devices/platform/smapi/BAT0/start_charge_thresh
|
||||
+# echo 70 > /sys/devices/platform/smapi/BAT0/stop_charge_thresh
|
||||
+# cat /sys/devices/platform/smapi/BAT0/*_charge_thresh
|
||||
+
|
||||
+ (This is useful since Li-Ion batteries wear out much faster at very
|
||||
+ high or low charge levels. The driver will also keeps the thresholds
|
||||
+ across suspend-to-disk with AC disconnected; this isn't done
|
||||
+ automatically by the hardware.)
|
||||
+
|
||||
+Inhibiting battery charging for 17 minutes (overrides thresholds):
|
||||
+
|
||||
+# echo 17 > /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes
|
||||
+# echo 0 > /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes # stop
|
||||
+# cat /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes
|
||||
+
|
||||
+ (This can be used to control which battery is charged when using an
|
||||
+ Ultrabay battery.)
|
||||
+
|
||||
+Forcing battery discharging even if AC power available:
|
||||
+
|
||||
+# echo 1 > /sys/devices/platform/smapi/BAT0/force_discharge # start discharge
|
||||
+# echo 0 > /sys/devices/platform/smapi/BAT0/force_discharge # stop discharge
|
||||
+# cat /sys/devices/platform/smapi/BAT0/force_discharge
|
||||
+
|
||||
+ (When AC is connected, forced discharging will automatically stop
|
||||
+ when battery is fully depleted -- this is useful for calibration.
|
||||
+ Also, this attribute can be used to control which battery is discharged
|
||||
+ when both a system battery and an Ultrabay battery are connected.)
|
||||
+
|
||||
+Misc read-only battery status attributes (see note about HDAPS below):
|
||||
+
|
||||
+/sys/devices/platform/smapi/BAT0/installed # 0 or 1
|
||||
+/sys/devices/platform/smapi/BAT0/state # idle/charging/discharging
|
||||
+/sys/devices/platform/smapi/BAT0/cycle_count # integer counter
|
||||
+/sys/devices/platform/smapi/BAT0/current_now # instantaneous current
|
||||
+/sys/devices/platform/smapi/BAT0/current_avg # last minute average
|
||||
+/sys/devices/platform/smapi/BAT0/power_now # instantaneous power
|
||||
+/sys/devices/platform/smapi/BAT0/power_avg # last minute average
|
||||
+/sys/devices/platform/smapi/BAT0/last_full_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_percent # remaining percent of energy (set by calibration)
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_percent_error # error range of remaing_percent (not reset by calibration)
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_running_time # in minutes, by last minute average power
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_running_time_now # in minutes, by instantenous power
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_charging_time # in minutes
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/design_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/voltage # in mV
|
||||
+/sys/devices/platform/smapi/BAT0/design_voltage # in mV
|
||||
+/sys/devices/platform/smapi/BAT0/charging_max_current # max charging current
|
||||
+/sys/devices/platform/smapi/BAT0/charging_max_voltage # max charging voltage
|
||||
+/sys/devices/platform/smapi/BAT0/group{0,1,2,3}_voltage # see below
|
||||
+/sys/devices/platform/smapi/BAT0/manufacturer # string
|
||||
+/sys/devices/platform/smapi/BAT0/model # string
|
||||
+/sys/devices/platform/smapi/BAT0/barcoding # string
|
||||
+/sys/devices/platform/smapi/BAT0/chemistry # string
|
||||
+/sys/devices/platform/smapi/BAT0/serial # integer
|
||||
+/sys/devices/platform/smapi/BAT0/manufacture_date # YYYY-MM-DD
|
||||
+/sys/devices/platform/smapi/BAT0/first_use_date # YYYY-MM-DD
|
||||
+/sys/devices/platform/smapi/BAT0/temperature # in milli-Celsius
|
||||
+/sys/devices/platform/smapi/BAT0/dump # see below
|
||||
+/sys/devices/platform/smapi/ac_connected # 0 or 1
|
||||
+
|
||||
+The BAT0/group{0,1,2,3}_voltage attribute refers to the separate cell groups
|
||||
+in each battery. For example, on the ThinkPad 600, X3x, T4x and R5x models,
|
||||
+the battery contains 3 cell groups in series, where each group consisting of 2
|
||||
+or 3 cells connected in parallel. The voltage of each group is given by these
|
||||
+attributes, and their sum (roughly) equals the "voltage" attribute.
|
||||
+(The effective performance of the battery is determined by the weakest group,
|
||||
+i.e., the one those voltage changes most rapidly during dis/charging.)
|
||||
+
|
||||
+The "BAT0/dump" attribute gives a a hex dump of the raw status data, which
|
||||
+contains additional data now in the above (if you can figure it out). Some
|
||||
+unused values are autodetected and replaced by "--":
|
||||
+
|
||||
+In all of the above, replace BAT0 with BAT1 to address the 2nd battery (e.g.
|
||||
+in the UltraBay).
|
||||
+
|
||||
+
|
||||
+Raw SMAPI calls:
|
||||
+
|
||||
+/sys/devices/platform/smapi/smapi_request
|
||||
+This performs raw SMAPI calls. It uses a bad interface that cannot handle
|
||||
+multiple simultaneous access. Don't touch it, it's for development only.
|
||||
+If you did touch it, you would so something like
|
||||
+# echo '211a 100 0 0' > /sys/devices/platform/smapi/smapi_request
|
||||
+# cat /sys/devices/platform/smapi/smapi_request
|
||||
+and notice that in the output "211a 34b b2 0 0 0 'OK'", the "4b" in the 2nd
|
||||
+value, converted to decimal is 75: the current charge stop threshold.
|
||||
+
|
||||
+
|
||||
+Model-specific status
|
||||
+---------------------
|
||||
+
|
||||
+Works (at least partially) on the following ThinkPad model:
|
||||
+* A30
|
||||
+* G41
|
||||
+* R40, R50p, R51, R52
|
||||
+* T23, T40, T40p, T41, T41p, T42, T42p, T43, T43p, T60, T61, T400, T410, T420 (partially)
|
||||
+* X24, X31, X32, X40, X41, X60, X61, X200, X201, X220 (partially)
|
||||
+* Z60t, Z61m
|
||||
+
|
||||
+Does not work on:
|
||||
+* X230 and newer
|
||||
+* T430 and newer
|
||||
+* Any ThinkPad Edge
|
||||
+* Any ThinkPad Yoga
|
||||
+* Any ThinkPad L series
|
||||
+* Any ThinkPad P series
|
||||
+
|
||||
+Not all functions are available on all models; for detailed status, see:
|
||||
+ http://thinkwiki.org/wiki/tp_smapi
|
||||
+
|
||||
+Please report success/failure by e-mail or on the Wiki.
|
||||
+If you get a "not implemented" or "not supported" message, your laptop
|
||||
+probably just can't do that (at least not via the SMAPI BIOS).
|
||||
+For negative reports, follow the bug reporting guidelines below.
|
||||
+If you send me the necessary technical data (i.e., SMAPI function
|
||||
+interfaces), I will support additional models.
|
||||
+
|
||||
+
|
||||
+Additional HDAPS features
|
||||
+-------------------------
|
||||
+
|
||||
+The modified hdaps driver has several improvements on the one in mainline
|
||||
+(beyond resolving the conflict with thinkpad_ec and tp_smapi):
|
||||
+
|
||||
+- Fixes reliability and improves support for recent ThinkPad models
|
||||
+ (especially *60 and newer). Unlike the mainline driver, the modified hdaps
|
||||
+ correctly follows the Embedded Controller communication protocol.
|
||||
+
|
||||
+- Extends the "invert" parameter to cover all possible axis orientations.
|
||||
+ The possible values are as follows.
|
||||
+ Let X,Y denote the hardware readouts.
|
||||
+ Let R denote the laptop's roll (tilt left/right).
|
||||
+ Let P denote the laptop's pitch (tilt forward/backward).
|
||||
+ invert=0: R= X P= Y (same as mainline)
|
||||
+ invert=1: R=-X P=-Y (same as mainline)
|
||||
+ invert=2: R=-X P= Y (new)
|
||||
+ invert=3: R= X P=-Y (new)
|
||||
+ invert=4: R= Y P= X (new)
|
||||
+ invert=5: R=-Y P=-X (new)
|
||||
+ invert=6: R=-Y P= X (new)
|
||||
+ invert=7: R= Y P=-X (new)
|
||||
+ It's probably easiest to just try all 8 possibilities and see which yields
|
||||
+ correct results (e.g., in the hdaps-gl visualisation).
|
||||
+
|
||||
+- Adds a whitelist which automatically sets the correct axis orientation for
|
||||
+ some models. If the value for your model is wrong or missing, you can override
|
||||
+ it using the "invert" parameter. Please also update the tables at
|
||||
+ http://www.thinkwiki.org/wiki/tp_smapi and
|
||||
+ http://www.thinkwiki.org/wiki/List_of_DMI_IDs
|
||||
+ and submit a patch for the whitelist in hdaps.c.
|
||||
+
|
||||
+- Provides new attributes:
|
||||
+ /sys/devices/platform/hdaps/sampling_rate:
|
||||
+ This determines the frequency at which the host queries the embedded
|
||||
+ controller for accelerometer data (and informs the hdaps input devices).
|
||||
+ Default=50.
|
||||
+ /sys/devices/platform/hdaps/oversampling_ratio:
|
||||
+ When set to X, the embedded controller is told to do physical accelerometer
|
||||
+ measurements at a rate that is X times higher than the rate at which
|
||||
+ the driver reads those measurements (i.e., X*sampling_rate). This
|
||||
+ makes the readouts from the embedded controller more fresh, and is also
|
||||
+ useful for the running average filter (see next). Default=5
|
||||
+ /sys/devices/platform/hdaps/running_avg_filter_order:
|
||||
+ When set to X, reported readouts will be the average of the last X physical
|
||||
+ accelerometer measurements. Current firmware allows 1<=X<=8. Setting to a
|
||||
+ high value decreases readout fluctuations. The averaging is handled by the
|
||||
+ embedded controller, so no CPU resources are used. Higher values make the
|
||||
+ readouts smoother, since it averages out both sensor noise (good) and abrupt
|
||||
+ changes (bad). Default=2.
|
||||
+
|
||||
+- Provides a second input device, which publishes the raw accelerometer
|
||||
+ measurements (without the fuzzing needed for joystick emulation). This input
|
||||
+ device can be matched by a udev rule such as the following (all on one line):
|
||||
+ KERNEL=="event[0-9]*", ATTRS{phys}=="hdaps/input1",
|
||||
+ ATTRS{modalias}=="input:b0019v1014p5054e4801-*",
|
||||
+ SYMLINK+="input/hdaps/accelerometer-event
|
||||
+
|
||||
+A new version of the hdapsd userspace daemon, which uses the input device
|
||||
+interface instead of polling sysfs, is available seprately. Using this reduces
|
||||
+the total interrupts per second generated by hdaps+hdapsd (on tickless kernels)
|
||||
+to 50, down from a value that fluctuates between 50 and 100. Set the
|
||||
+sampling_rate sysfs attribute to a lower value to further reduce interrupts,
|
||||
+at the expense of response latency.
|
||||
+
|
||||
+Licensing note: all my changes to the HDAPS driver are licensed under the
|
||||
+GPL version 2 or, at your option and to the extent allowed by derivation from
|
||||
+prior works, any later version. My version of hdaps is derived work from the
|
||||
+mainline version, which at the time of writing is available only under
|
||||
+GPL version 2.
|
||||
+
|
||||
+Bug reporting
|
||||
+-------------
|
||||
+
|
||||
+Mail <multinymous@gmail.com>. Please include:
|
||||
+* Details about your model,
|
||||
+* Relevant "dmesg" output. Make sure thinkpad_ec and tp_smapi are loaded with
|
||||
+ the "debug=1" parameter (e.g., use "make load HDAPS=1 DEBUG=1").
|
||||
+* Output of "dmidecode | grep -C5 Product"
|
||||
+* Does the failed functionality works under Windows?
|
||||
+
|
||||
+
|
||||
+More about SMAPI
|
||||
+----------------
|
||||
+
|
||||
+For hints about what may be possible via the SMAPI BIOS and how, see:
|
||||
+
|
||||
+* IBM Technical Reference Manual for the ThinkPad 770
|
||||
+ (http://www-307.ibm.com/pc/support/site.wss/document.do?lndocid=PFAN-3TUQQD)
|
||||
+* Exported symbols in PWRMGRIF.DLL or TPPWRW32.DLL (e.g., use "objdump -x").
|
||||
+* drivers/char/mwave/smapi.c in the Linux kernel tree.*
|
||||
+* The "thinkpad" SMAPI module (http://tpctl.sourceforge.net).
|
||||
+* The SMAPI_* constants in tp_smapi.c.
|
||||
+
|
||||
+Note that in the above Technical Reference and in the "thinkpad" module,
|
||||
+SMAPI is invoked through a function call to some physical address. However,
|
||||
+the interface used by tp_smapi and the above mwave drive, and apparently
|
||||
+required by newer ThinkPad, is different: you set the parameters up in the
|
||||
+CPU's registers and write to ports 0xB2 (the APM control port) and 0x4F; this
|
||||
+triggers an SMI (System Management Interrupt), causing the CPU to enter
|
||||
+SMM (System Management Mode) and run the BIOS firmware; the results are
|
||||
+returned in the CPU's registers. It is not clear what is the relation between
|
||||
+the two variants of SMAPI, though the assignment of error codes seems to be
|
||||
+similar.
|
||||
+
|
||||
+In addition, the embedded controller on ThinkPad laptops has a non-standard
|
||||
+interface at IO ports 0x1600-0x161F (mapped to LCP channel 3 of the H8S chip).
|
||||
+The interface provides various system management services (currently known:
|
||||
+battery information and accelerometer readouts). For more information see the
|
||||
+thinkpad_ec module and the H8S hardware documentation:
|
||||
+http://documentation.renesas.com/eng/products/mpumcu/rej09b0300_2140bhm.pdf
|
||||
diff --git a/init/Kconfig b/init/Kconfig
|
||||
index b4daad2bac23..c1e59dc04209 100644
|
||||
--- a/init/Kconfig
|
||||
|
||||
@ -93,6 +93,7 @@ makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc' 'libelf' 'patchutils'
|
||||
optdepends=('schedtool')
|
||||
options=('!strip')
|
||||
source=("https://git.kernel.org/torvalds/t/linux-${_basekernel}-${_sub}.tar.gz"
|
||||
"https://raw.githubusercontent.com/graysky2/kernel_gcc_patch/master/enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.8%2B.patch"
|
||||
'config.x86_64' # stock Arch config
|
||||
#'config_hardened.x86_64' # hardened Arch config
|
||||
90-cleanup.hook
|
||||
@ -119,12 +120,13 @@ source=("https://git.kernel.org/torvalds/t/linux-${_basekernel}-${_sub}.tar.gz"
|
||||
#0012-linux-hardened.patch
|
||||
)
|
||||
sha256sums=('096c637e492f25379c2130291b0cf938e7fff14206dd530b1f55b2ba54b9c40f'
|
||||
'5ab29eb64e57df83b395a29a6a4f89030d142feffbfbf73b3afc6d97a2a7fd12'
|
||||
'1bfe5ec855c8774f9cade253c0770d3691295ed03f4707abc76b0f29bb6fd67b'
|
||||
'1e15fc2ef3fa770217ecc63a220e5df2ddbcf3295eb4a021171e7edd4c6cc898'
|
||||
'66a03c246037451a77b4d448565b1d7e9368270c7d02872fbd0b5d024ed0a997'
|
||||
'f6383abef027fd9a430fd33415355e0df492cdc3c90e9938bf2d98f4f63b32e6'
|
||||
'd02bf5ca08fd610394b9d3a0c3b176d74af206f897dee826e5cbaec97bb4a4aa'
|
||||
'3c30d6645680d4818240dcf61172777791533fea18d00d2208e9863a338f8555'
|
||||
'e36b6efad764eeede8cf90b4de6ef5f9241e8cf531530b33ee2e024e2961e9b5'
|
||||
'7058e57fd68367b029adc77f2a82928f1433daaf02c8c279cb2d13556c8804d7'
|
||||
'62496f9ca788996181ef145f96ad26291282fcc3fb95cdc04080dcf84365be33'
|
||||
'7fd8e776209dac98627453fda754bdf9aff4a09f27cb0b3766d7983612eb3c74'
|
||||
@ -207,9 +209,15 @@ prepare() {
|
||||
patch -Np1 -i ../0001-add-sysctl-to-disallow-unprivileged-CLONE_NEWUSER-by.patch
|
||||
fi
|
||||
|
||||
# graysky's cpu opts - https://github.com/graysky2/kernel_gcc_patch
|
||||
msg2 "Applying graysky's cpu opts patch"
|
||||
patch -Np1 -i ../enable_additional_cpu_optimizations_for_gcc_v10.1%2B_kernel_v5.8%2B.patch
|
||||
|
||||
# TkG
|
||||
msg2 "Applying clear linux patches"
|
||||
patch -Np1 -i ../0002-clear-patches.patch
|
||||
|
||||
msg2 "Applying glitched base patch"
|
||||
patch -Np1 -i ../0003-glitched-base.patch
|
||||
|
||||
if [ "${_cpusched}" == "MuQSS" ]; then
|
||||
@ -295,6 +303,8 @@ prepare() {
|
||||
echo "# CONFIG_MGOLDMONT is not set" >> ./.config
|
||||
echo "# CONFIG_MGOLDMONTPLUS is not set" >> ./.config
|
||||
echo "# CONFIG_MCASCADELAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MCOOPERLAKE is not set" >> ./.config
|
||||
echo "# CONFIG_MTIGERLAKE is not set" >> ./.config
|
||||
|
||||
# Disable some debugging
|
||||
if [ "${_debugdisable}" == "true" ]; then
|
||||
@ -485,6 +495,10 @@ prepare() {
|
||||
sed -i -e 's/# CONFIG_MGOLDMONTPLUS is not set/CONFIG_MGOLDMONTPLUS=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cascadelake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCASCADELAKE is not set/CONFIG_MCASCADELAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "cooperlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MCOOPERLAKE is not set/CONFIG_MCOOPERLAKE=y/' ./.config
|
||||
elif [ "$_processor_opt" == "tigerlake" ]; then
|
||||
sed -i -e 's/# CONFIG_MTIGERLAKE is not set/CONFIG_MTIGERLAKE=y/' ./.config
|
||||
fi
|
||||
|
||||
# irq threading
|
||||
|
||||
@ -15,7 +15,7 @@ If you want to streamline your kernel config for lower footprint and faster comp
|
||||
You can enable support for it at the beginning of the PKGBUILD file. Make sure to read everything you need to know about it.
|
||||
|
||||
## Other stuff included:
|
||||
- Per-CPU-arch native optimizations
|
||||
- Graysky's per-CPU-arch native optimizations - https://github.com/graysky2/kernel_gcc_patch
|
||||
- memory management and swapping tweaks
|
||||
- scheduling tweaks
|
||||
- optional "Zenify" patchset using core blk, mm and scheduler tweaks from Zen
|
||||
|
||||
@ -104,7 +104,7 @@ _compileroptlevel="1"
|
||||
|
||||
# CPU compiler optimizations - Defaults to generic optimizations if left empty
|
||||
# AMD CPUs : "k8" "k8sse3" "k10" "barcelona" "bobcat" "jaguar" "bulldozer" "piledriver" "steamroller" "excavator" "zen" "zen2"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake"
|
||||
# Intel CPUs : "mpsc"(P4 & older Netburst based Xeon) "atom" "core2" "nehalem" "westmere" "silvermont" "sandybridge" "ivybridge" "haswell" "broadwell" "skylake" "skylakex" "cannonlake" "icelake" "goldmont" "goldmontplus" "cascadelake" "cooperlake" "tigerlake"
|
||||
# Other options :
|
||||
# - "generic" (to share the package between machines with different CPUs)
|
||||
# - "native" (use compiler autodetection and will prompt for P6_NOPS - Selecting your arch manually in the list above is recommended instead of this option)
|
||||
|
||||
@ -18,571 +18,6 @@ index 87f1fc9..b3be470 100755
|
||||
if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi
|
||||
UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP"
|
||||
|
||||
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
|
||||
index af9c967782f6..bf07a8c0f495 100644
|
||||
--- a/arch/x86/Kconfig.cpu
|
||||
+++ b/arch/x86/Kconfig.cpu
|
||||
@@ -123,6 +123,7 @@ config MPENTIUMM
|
||||
config MPENTIUM4
|
||||
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
|
||||
depends on X86_32
|
||||
+ select X86_P6_NOP
|
||||
help
|
||||
Select this for Intel Pentium 4 chips. This includes the
|
||||
Pentium 4, Pentium D, P4-based Celeron and Xeon, and
|
||||
@@ -155,9 +156,8 @@ config MPENTIUM4
|
||||
-Paxville
|
||||
-Dempsey
|
||||
|
||||
-
|
||||
config MK6
|
||||
- bool "K6/K6-II/K6-III"
|
||||
+ bool "AMD K6/K6-II/K6-III"
|
||||
depends on X86_32
|
||||
help
|
||||
Select this for an AMD K6-family processor. Enables use of
|
||||
@@ -165,7 +165,7 @@ config MK6
|
||||
flags to GCC.
|
||||
|
||||
config MK7
|
||||
- bool "Athlon/Duron/K7"
|
||||
+ bool "AMD Athlon/Duron/K7"
|
||||
depends on X86_32
|
||||
help
|
||||
Select this for an AMD Athlon K7-family processor. Enables use of
|
||||
@@ -173,12 +173,90 @@ config MK7
|
||||
flags to GCC.
|
||||
|
||||
config MK8
|
||||
- bool "Opteron/Athlon64/Hammer/K8"
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8"
|
||||
help
|
||||
Select this for an AMD Opteron or Athlon64 Hammer-family processor.
|
||||
Enables use of some extended instructions, and passes appropriate
|
||||
optimization flags to GCC.
|
||||
|
||||
+config MK8SSE3
|
||||
+ bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
|
||||
+ help
|
||||
+ Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MK10
|
||||
+ bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
|
||||
+ help
|
||||
+ Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
|
||||
+ Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
|
||||
+ Enables use of some extended instructions, and passes appropriate
|
||||
+ optimization flags to GCC.
|
||||
+
|
||||
+config MBARCELONA
|
||||
+ bool "AMD Barcelona"
|
||||
+ help
|
||||
+ Select this for AMD Family 10h Barcelona processors.
|
||||
+
|
||||
+ Enables -march=barcelona
|
||||
+
|
||||
+config MBOBCAT
|
||||
+ bool "AMD Bobcat"
|
||||
+ help
|
||||
+ Select this for AMD Family 14h Bobcat processors.
|
||||
+
|
||||
+ Enables -march=btver1
|
||||
+
|
||||
+config MJAGUAR
|
||||
+ bool "AMD Jaguar"
|
||||
+ help
|
||||
+ Select this for AMD Family 16h Jaguar processors.
|
||||
+
|
||||
+ Enables -march=btver2
|
||||
+
|
||||
+config MBULLDOZER
|
||||
+ bool "AMD Bulldozer"
|
||||
+ help
|
||||
+ Select this for AMD Family 15h Bulldozer processors.
|
||||
+
|
||||
+ Enables -march=bdver1
|
||||
+
|
||||
+config MPILEDRIVER
|
||||
+ bool "AMD Piledriver"
|
||||
+ help
|
||||
+ Select this for AMD Family 15h Piledriver processors.
|
||||
+
|
||||
+ Enables -march=bdver2
|
||||
+
|
||||
+config MSTEAMROLLER
|
||||
+ bool "AMD Steamroller"
|
||||
+ help
|
||||
+ Select this for AMD Family 15h Steamroller processors.
|
||||
+
|
||||
+ Enables -march=bdver3
|
||||
+
|
||||
+config MEXCAVATOR
|
||||
+ bool "AMD Excavator"
|
||||
+ help
|
||||
+ Select this for AMD Family 15h Excavator processors.
|
||||
+
|
||||
+ Enables -march=bdver4
|
||||
+
|
||||
+config MZEN
|
||||
+ bool "AMD Zen"
|
||||
+ help
|
||||
+ Select this for AMD Family 17h Zen processors.
|
||||
+
|
||||
+ Enables -march=znver1
|
||||
+
|
||||
+config MZEN2
|
||||
+ bool "AMD Zen 2"
|
||||
+ help
|
||||
+ Select this for AMD Family 17h Zen 2 processors.
|
||||
+
|
||||
+ Enables -march=znver2
|
||||
+
|
||||
config MCRUSOE
|
||||
bool "Crusoe"
|
||||
depends on X86_32
|
||||
@@ -260,6 +338,7 @@ config MVIAC7
|
||||
|
||||
config MPSC
|
||||
bool "Intel P4 / older Netburst based Xeon"
|
||||
+ select X86_P6_NOP
|
||||
depends on X86_64
|
||||
help
|
||||
Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
|
||||
@@ -269,8 +348,19 @@ config MPSC
|
||||
using the cpu family field
|
||||
in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
|
||||
|
||||
+config MATOM
|
||||
+ bool "Intel Atom"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
+ in-order pipelining architecture and thus can benefit from
|
||||
+ accordingly optimized code. Use a recent GCC with specific Atom
|
||||
+ support in order to fully benefit from selecting this option.
|
||||
+
|
||||
config MCORE2
|
||||
- bool "Core 2/newer Xeon"
|
||||
+ bool "Intel Core 2"
|
||||
+ select X86_P6_NOP
|
||||
help
|
||||
|
||||
Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
|
||||
@@ -278,14 +368,133 @@ config MCORE2
|
||||
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
|
||||
(not a typo)
|
||||
|
||||
-config MATOM
|
||||
- bool "Intel Atom"
|
||||
+ Enables -march=core2
|
||||
+
|
||||
+config MNEHALEM
|
||||
+ bool "Intel Nehalem"
|
||||
+ select X86_P6_NOP
|
||||
help
|
||||
|
||||
- Select this for the Intel Atom platform. Intel Atom CPUs have an
|
||||
- in-order pipelining architecture and thus can benefit from
|
||||
- accordingly optimized code. Use a recent GCC with specific Atom
|
||||
- support in order to fully benefit from selecting this option.
|
||||
+ Select this for 1st Gen Core processors in the Nehalem family.
|
||||
+
|
||||
+ Enables -march=nehalem
|
||||
+
|
||||
+config MWESTMERE
|
||||
+ bool "Intel Westmere"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for the Intel Westmere formerly Nehalem-C family.
|
||||
+
|
||||
+ Enables -march=westmere
|
||||
+
|
||||
+config MSILVERMONT
|
||||
+ bool "Intel Silvermont"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for the Intel Silvermont platform.
|
||||
+
|
||||
+ Enables -march=silvermont
|
||||
+
|
||||
+config MGOLDMONT
|
||||
+ bool "Intel Goldmont"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for the Intel Goldmont platform including Apollo Lake and Denverton.
|
||||
+
|
||||
+ Enables -march=goldmont
|
||||
+
|
||||
+config MGOLDMONTPLUS
|
||||
+ bool "Intel Goldmont Plus"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for the Intel Goldmont Plus platform including Gemini Lake.
|
||||
+
|
||||
+ Enables -march=goldmont-plus
|
||||
+
|
||||
+config MSANDYBRIDGE
|
||||
+ bool "Intel Sandy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 2nd Gen Core processors in the Sandy Bridge family.
|
||||
+
|
||||
+ Enables -march=sandybridge
|
||||
+
|
||||
+config MIVYBRIDGE
|
||||
+ bool "Intel Ivy Bridge"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 3rd Gen Core processors in the Ivy Bridge family.
|
||||
+
|
||||
+ Enables -march=ivybridge
|
||||
+
|
||||
+config MHASWELL
|
||||
+ bool "Intel Haswell"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 4th Gen Core processors in the Haswell family.
|
||||
+
|
||||
+ Enables -march=haswell
|
||||
+
|
||||
+config MBROADWELL
|
||||
+ bool "Intel Broadwell"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 5th Gen Core processors in the Broadwell family.
|
||||
+
|
||||
+ Enables -march=broadwell
|
||||
+
|
||||
+config MSKYLAKE
|
||||
+ bool "Intel Skylake"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake family.
|
||||
+
|
||||
+ Enables -march=skylake
|
||||
+
|
||||
+config MSKYLAKEX
|
||||
+ bool "Intel Skylake X"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 6th Gen Core processors in the Skylake X family.
|
||||
+
|
||||
+ Enables -march=skylake-avx512
|
||||
+
|
||||
+config MCANNONLAKE
|
||||
+ bool "Intel Cannon Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 8th Gen Core processors
|
||||
+
|
||||
+ Enables -march=cannonlake
|
||||
+
|
||||
+config MICELAKE
|
||||
+ bool "Intel Ice Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for 10th Gen Core processors in the Ice Lake family.
|
||||
+
|
||||
+ Enables -march=icelake-client
|
||||
+
|
||||
+config MCASCADELAKE
|
||||
+ bool "Intel Cascade Lake"
|
||||
+ select X86_P6_NOP
|
||||
+ help
|
||||
+
|
||||
+ Select this for Xeon processors in the Cascade Lake family.
|
||||
+
|
||||
+ Enables -march=cascadelake
|
||||
|
||||
config GENERIC_CPU
|
||||
bool "Generic-x86-64"
|
||||
@@ -294,6 +503,19 @@ config GENERIC_CPU
|
||||
Generic x86-64 CPU.
|
||||
Run equally well on all x86-64 CPUs.
|
||||
|
||||
+config MNATIVE
|
||||
+ bool "Native optimizations autodetected by GCC"
|
||||
+ help
|
||||
+
|
||||
+ GCC 4.2 and above support -march=native, which automatically detects
|
||||
+ the optimum settings to use based on your processor. -march=native
|
||||
+ also detects and applies additional settings beyond -march specific
|
||||
+ to your CPU, (eg. -msse4). Unless you have a specific reason not to
|
||||
+ (e.g. distcc cross-compiling), you should probably be using
|
||||
+ -march=native rather than anything listed below.
|
||||
+
|
||||
+ Enables -march=native
|
||||
+
|
||||
endchoice
|
||||
|
||||
config X86_GENERIC
|
||||
@@ -318,7 +540,7 @@ config X86_INTERNODE_CACHE_SHIFT
|
||||
config X86_L1_CACHE_SHIFT
|
||||
int
|
||||
default "7" if MPENTIUM4 || MPSC
|
||||
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
|
||||
default "4" if MELAN || M486SX || M486 || MGEODEGX1
|
||||
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
|
||||
|
||||
@@ -336,35 +558,36 @@ config X86_ALIGNMENT_16
|
||||
|
||||
config X86_INTEL_USERCOPY
|
||||
def_bool y
|
||||
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
|
||||
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE
|
||||
|
||||
config X86_USE_PPRO_CHECKSUM
|
||||
def_bool y
|
||||
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
|
||||
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MATOM || MNATIVE
|
||||
|
||||
config X86_USE_3DNOW
|
||||
def_bool y
|
||||
depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
|
||||
|
||||
-#
|
||||
-# P6_NOPs are a relatively minor optimization that require a family >=
|
||||
-# 6 processor, except that it is broken on certain VIA chips.
|
||||
-# Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
-# (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
-# does not understand them.
|
||||
-#
|
||||
-# As a result, disallow these if we're not compiling for X86_64 (these
|
||||
-# NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
-# the right-hand clause are the cores that benefit from this optimization.
|
||||
-#
|
||||
config X86_P6_NOP
|
||||
- def_bool y
|
||||
- depends on X86_64
|
||||
- depends on (MCORE2 || MPENTIUM4 || MPSC)
|
||||
+ default n
|
||||
+ bool "Support for P6_NOPs on Intel chips"
|
||||
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE)
|
||||
+ help
|
||||
+ P6_NOPs are a relatively minor optimization that require a family >=
|
||||
+ 6 processor, except that it is broken on certain VIA chips.
|
||||
+ Furthermore, AMD chips prefer a totally different sequence of NOPs
|
||||
+ (which work on all CPUs). In addition, it looks like Virtual PC
|
||||
+ does not understand them.
|
||||
+
|
||||
+ As a result, disallow these if we're not compiling for X86_64 (these
|
||||
+ NOPs do work on all x86-64 capable chips); the list of processors in
|
||||
+ the right-hand clause are the cores that benefit from this optimization.
|
||||
+
|
||||
+ Say Y if you have Intel CPU newer than Pentium Pro, N otherwise.
|
||||
|
||||
config X86_TSC
|
||||
def_bool y
|
||||
- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
|
||||
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM) || X86_64
|
||||
|
||||
config X86_CMPXCHG64
|
||||
def_bool y
|
||||
@@ -374,7 +597,7 @@ config X86_CMPXCHG64
|
||||
# generates cmov.
|
||||
config X86_CMOV
|
||||
def_bool y
|
||||
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
|
||||
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
|
||||
|
||||
config X86_MINIMUM_CPU_FAMILY
|
||||
int
|
||||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
|
||||
index 94df0868804b..dcbed7e3a070 100644
|
||||
--- a/arch/x86/Makefile
|
||||
+++ b/arch/x86/Makefile
|
||||
@@ -119,13 +119,53 @@ else
|
||||
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)
|
||||
|
||||
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
|
||||
+ cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
|
||||
+ cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-mtune=k8)
|
||||
+ cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10)
|
||||
+ cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona)
|
||||
+ cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1)
|
||||
+ cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2)
|
||||
+ cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1)
|
||||
+ cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2)
|
||||
+ cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3)
|
||||
+ cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4)
|
||||
+ cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1)
|
||||
+ cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2)
|
||||
cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
|
||||
|
||||
cflags-$(CONFIG_MCORE2) += \
|
||||
- $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
|
||||
- cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+ $(call cc-option,-march=core2,$(call cc-option,-mtune=core2))
|
||||
+ cflags-$(CONFIG_MNEHALEM) += \
|
||||
+ $(call cc-option,-march=nehalem,$(call cc-option,-mtune=nehalem))
|
||||
+ cflags-$(CONFIG_MWESTMERE) += \
|
||||
+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
|
||||
+ cflags-$(CONFIG_MSILVERMONT) += \
|
||||
+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
|
||||
+ cflags-$(CONFIG_MGOLDMONT) += \
|
||||
+ $(call cc-option,-march=goldmont,$(call cc-option,-mtune=goldmont))
|
||||
+ cflags-$(CONFIG_MGOLDMONTPLUS) += \
|
||||
+ $(call cc-option,-march=goldmont-plus,$(call cc-option,-mtune=goldmont-plus))
|
||||
+ cflags-$(CONFIG_MSANDYBRIDGE) += \
|
||||
+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
|
||||
+ cflags-$(CONFIG_MIVYBRIDGE) += \
|
||||
+ $(call cc-option,-march=ivybridge,$(call cc-option,-mtune=ivybridge))
|
||||
+ cflags-$(CONFIG_MHASWELL) += \
|
||||
+ $(call cc-option,-march=haswell,$(call cc-option,-mtune=haswell))
|
||||
+ cflags-$(CONFIG_MBROADWELL) += \
|
||||
+ $(call cc-option,-march=broadwell,$(call cc-option,-mtune=broadwell))
|
||||
+ cflags-$(CONFIG_MSKYLAKE) += \
|
||||
+ $(call cc-option,-march=skylake,$(call cc-option,-mtune=skylake))
|
||||
+ cflags-$(CONFIG_MSKYLAKEX) += \
|
||||
+ $(call cc-option,-march=skylake-avx512,$(call cc-option,-mtune=skylake-avx512))
|
||||
+ cflags-$(CONFIG_MCANNONLAKE) += \
|
||||
+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
|
||||
+ cflags-$(CONFIG_MICELAKE) += \
|
||||
+ $(call cc-option,-march=icelake-client,$(call cc-option,-mtune=icelake-client))
|
||||
+ cflags-$(CONFIG_MCASCADELAKE) += \
|
||||
+ $(call cc-option,-march=cascadelake,$(call cc-option,-mtune=cascadelake))
|
||||
+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
|
||||
KBUILD_CFLAGS += $(cflags-y)
|
||||
|
||||
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
|
||||
index cd3056759880..2c81838df533 100644
|
||||
--- a/arch/x86/Makefile_32.cpu
|
||||
+++ b/arch/x86/Makefile_32.cpu
|
||||
@@ -24,7 +24,19 @@ cflags-$(CONFIG_MK6) += -march=k6
|
||||
# Please note, that patches that add -march=athlon-xp and friends are pointless.
|
||||
# They make zero difference whatsosever to performance at this time.
|
||||
cflags-$(CONFIG_MK7) += -march=athlon
|
||||
+cflags-$(CONFIG_MNATIVE) += $(call cc-option,-march=native)
|
||||
cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8,-march=athlon)
|
||||
+cflags-$(CONFIG_MK8SSE3) += $(call cc-option,-march=k8-sse3,-march=athlon)
|
||||
+cflags-$(CONFIG_MK10) += $(call cc-option,-march=amdfam10,-march=athlon)
|
||||
+cflags-$(CONFIG_MBARCELONA) += $(call cc-option,-march=barcelona,-march=athlon)
|
||||
+cflags-$(CONFIG_MBOBCAT) += $(call cc-option,-march=btver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MJAGUAR) += $(call cc-option,-march=btver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MBULLDOZER) += $(call cc-option,-march=bdver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MPILEDRIVER) += $(call cc-option,-march=bdver2,-march=athlon)
|
||||
+cflags-$(CONFIG_MSTEAMROLLER) += $(call cc-option,-march=bdver3,-march=athlon)
|
||||
+cflags-$(CONFIG_MEXCAVATOR) += $(call cc-option,-march=bdver4,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN) += $(call cc-option,-march=znver1,-march=athlon)
|
||||
+cflags-$(CONFIG_MZEN2) += $(call cc-option,-march=znver2,-march=athlon)
|
||||
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
|
||||
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
|
||||
@@ -33,8 +45,22 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) -falign-fu
|
||||
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
|
||||
cflags-$(CONFIG_MVIAC7) += -march=i686
|
||||
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
|
||||
-cflags-$(CONFIG_MATOM) += $(call cc-option,-march=atom,$(call cc-option,-march=core2,-march=i686)) \
|
||||
- $(call cc-option,-mtune=atom,$(call cc-option,-mtune=generic))
|
||||
+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
|
||||
+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
|
||||
+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
|
||||
+cflags-$(CONFIG_MGOLDMONT) += -march=i686 $(call tune,goldmont)
|
||||
+cflags-$(CONFIG_MGOLDMONTPLUS) += -march=i686 $(call tune,goldmont-plus)
|
||||
+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
|
||||
+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
|
||||
+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
|
||||
+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
|
||||
+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
|
||||
+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
|
||||
+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
|
||||
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake-client)
|
||||
+cflags-$(CONFIG_MCASCADELAKE) += -march=i686 $(call tune,cascadelake)
|
||||
+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
|
||||
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
|
||||
|
||||
# AMD Elan support
|
||||
cflags-$(CONFIG_MELAN) += -march=i486
|
||||
diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h
|
||||
index c215d2762488..a4fddfe3d4fb 100644
|
||||
--- a/arch/x86/include/asm/vermagic.h
|
||||
+++ b/arch/x86/include/asm/vermagic.h
|
||||
@@ -27,6 +27,36 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "586MMX "
|
||||
#elif defined CONFIG_MCORE2
|
||||
#define MODULE_PROC_FAMILY "CORE2 "
|
||||
+#elif defined CONFIG_MNATIVE
|
||||
+#define MODULE_PROC_FAMILY "NATIVE "
|
||||
+#elif defined CONFIG_MNEHALEM
|
||||
+#define MODULE_PROC_FAMILY "NEHALEM "
|
||||
+#elif defined CONFIG_MWESTMERE
|
||||
+#define MODULE_PROC_FAMILY "WESTMERE "
|
||||
+#elif defined CONFIG_MSILVERMONT
|
||||
+#define MODULE_PROC_FAMILY "SILVERMONT "
|
||||
+#elif defined CONFIG_MGOLDMONT
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONT "
|
||||
+#elif defined CONFIG_MGOLDMONTPLUS
|
||||
+#define MODULE_PROC_FAMILY "GOLDMONTPLUS "
|
||||
+#elif defined CONFIG_MSANDYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
|
||||
+#elif defined CONFIG_MIVYBRIDGE
|
||||
+#define MODULE_PROC_FAMILY "IVYBRIDGE "
|
||||
+#elif defined CONFIG_MHASWELL
|
||||
+#define MODULE_PROC_FAMILY "HASWELL "
|
||||
+#elif defined CONFIG_MBROADWELL
|
||||
+#define MODULE_PROC_FAMILY "BROADWELL "
|
||||
+#elif defined CONFIG_MSKYLAKE
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKE "
|
||||
+#elif defined CONFIG_MSKYLAKEX
|
||||
+#define MODULE_PROC_FAMILY "SKYLAKEX "
|
||||
+#elif defined CONFIG_MCANNONLAKE
|
||||
+#define MODULE_PROC_FAMILY "CANNONLAKE "
|
||||
+#elif defined CONFIG_MICELAKE
|
||||
+#define MODULE_PROC_FAMILY "ICELAKE "
|
||||
+#elif defined CONFIG_MCASCADELAKE
|
||||
+#define MODULE_PROC_FAMILY "CASCADELAKE "
|
||||
#elif defined CONFIG_MATOM
|
||||
#define MODULE_PROC_FAMILY "ATOM "
|
||||
#elif defined CONFIG_M686
|
||||
@@ -45,6 +75,28 @@ struct mod_arch_specific {
|
||||
#define MODULE_PROC_FAMILY "K7 "
|
||||
#elif defined CONFIG_MK8
|
||||
#define MODULE_PROC_FAMILY "K8 "
|
||||
+#elif defined CONFIG_MK8SSE3
|
||||
+#define MODULE_PROC_FAMILY "K8SSE3 "
|
||||
+#elif defined CONFIG_MK10
|
||||
+#define MODULE_PROC_FAMILY "K10 "
|
||||
+#elif defined CONFIG_MBARCELONA
|
||||
+#define MODULE_PROC_FAMILY "BARCELONA "
|
||||
+#elif defined CONFIG_MBOBCAT
|
||||
+#define MODULE_PROC_FAMILY "BOBCAT "
|
||||
+#elif defined CONFIG_MBULLDOZER
|
||||
+#define MODULE_PROC_FAMILY "BULLDOZER "
|
||||
+#elif defined CONFIG_MPILEDRIVER
|
||||
+#define MODULE_PROC_FAMILY "PILEDRIVER "
|
||||
+#elif defined CONFIG_MSTEAMROLLER
|
||||
+#define MODULE_PROC_FAMILY "STEAMROLLER "
|
||||
+#elif defined CONFIG_MJAGUAR
|
||||
+#define MODULE_PROC_FAMILY "JAGUAR "
|
||||
+#elif defined CONFIG_MEXCAVATOR
|
||||
+#define MODULE_PROC_FAMILY "EXCAVATOR "
|
||||
+#elif defined CONFIG_MZEN
|
||||
+#define MODULE_PROC_FAMILY "ZEN "
|
||||
+#elif defined CONFIG_MZEN2
|
||||
+#define MODULE_PROC_FAMILY "ZEN2 "
|
||||
#elif defined CONFIG_MELAN
|
||||
#define MODULE_PROC_FAMILY "ELAN "
|
||||
#elif defined CONFIG_MCRUSOE
|
||||
diff --git a/fs/dcache.c b/fs/dcache.c
|
||||
index 2acfc69878f5..3f1131431e06 100644
|
||||
--- a/fs/dcache.c
|
||||
@ -641,287 +76,6 @@ Date: Mon, 3 Sep 2018 17:36:25 +0200
|
||||
Subject: Zenify & stuff
|
||||
|
||||
|
||||
diff --git a/Documentation/tp_smapi.txt b/Documentation/tp_smapi.txt
|
||||
new file mode 100644
|
||||
index 000000000000..a249678a8866
|
||||
--- /dev/null
|
||||
+++ b/Documentation/tp_smapi.txt
|
||||
@@ -0,0 +1,275 @@
|
||||
+tp_smapi version 0.42
|
||||
+IBM ThinkPad hardware functions driver
|
||||
+
|
||||
+Author: Shem Multinymous <multinymous@gmail.com>
|
||||
+Project: http://sourceforge.net/projects/tpctl
|
||||
+Wiki: http://thinkwiki.org/wiki/tp_smapi
|
||||
+List: linux-thinkpad@linux-thinkpad.org
|
||||
+ (http://mailman.linux-thinkpad.org/mailman/listinfo/linux-thinkpad)
|
||||
+
|
||||
+Description
|
||||
+-----------
|
||||
+
|
||||
+ThinkPad laptops include a proprietary interface called SMAPI BIOS
|
||||
+(System Management Application Program Interface) which provides some
|
||||
+hardware control functionality that is not accessible by other means.
|
||||
+
|
||||
+This driver exposes some features of the SMAPI BIOS through a sysfs
|
||||
+interface. It is suitable for newer models, on which SMAPI is invoked
|
||||
+through IO port writes. Older models use a different SMAPI interface;
|
||||
+for those, try the "thinkpad" module from the "tpctl" package.
|
||||
+
|
||||
+WARNING:
|
||||
+This driver uses undocumented features and direct hardware access.
|
||||
+It thus cannot be guaranteed to work, and may cause arbitrary damage
|
||||
+(especially on models it wasn't tested on).
|
||||
+
|
||||
+
|
||||
+Module parameters
|
||||
+-----------------
|
||||
+
|
||||
+thinkpad_ec module:
|
||||
+ force_io=1 lets thinkpad_ec load on some recent ThinkPad models
|
||||
+ (e.g., T400 and T500) whose BIOS's ACPI DSDT reserves the ports we need.
|
||||
+tp_smapi module:
|
||||
+ debug=1 enables verbose dmesg output.
|
||||
+
|
||||
+
|
||||
+Usage
|
||||
+-----
|
||||
+
|
||||
+Control of battery charging thresholds (in percents of current full charge
|
||||
+capacity):
|
||||
+
|
||||
+# echo 40 > /sys/devices/platform/smapi/BAT0/start_charge_thresh
|
||||
+# echo 70 > /sys/devices/platform/smapi/BAT0/stop_charge_thresh
|
||||
+# cat /sys/devices/platform/smapi/BAT0/*_charge_thresh
|
||||
+
|
||||
+ (This is useful since Li-Ion batteries wear out much faster at very
|
||||
+ high or low charge levels. The driver will also keeps the thresholds
|
||||
+ across suspend-to-disk with AC disconnected; this isn't done
|
||||
+ automatically by the hardware.)
|
||||
+
|
||||
+Inhibiting battery charging for 17 minutes (overrides thresholds):
|
||||
+
|
||||
+# echo 17 > /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes
|
||||
+# echo 0 > /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes # stop
|
||||
+# cat /sys/devices/platform/smapi/BAT0/inhibit_charge_minutes
|
||||
+
|
||||
+ (This can be used to control which battery is charged when using an
|
||||
+ Ultrabay battery.)
|
||||
+
|
||||
+Forcing battery discharging even if AC power available:
|
||||
+
|
||||
+# echo 1 > /sys/devices/platform/smapi/BAT0/force_discharge # start discharge
|
||||
+# echo 0 > /sys/devices/platform/smapi/BAT0/force_discharge # stop discharge
|
||||
+# cat /sys/devices/platform/smapi/BAT0/force_discharge
|
||||
+
|
||||
+ (When AC is connected, forced discharging will automatically stop
|
||||
+ when battery is fully depleted -- this is useful for calibration.
|
||||
+ Also, this attribute can be used to control which battery is discharged
|
||||
+ when both a system battery and an Ultrabay battery are connected.)
|
||||
+
|
||||
+Misc read-only battery status attributes (see note about HDAPS below):
|
||||
+
|
||||
+/sys/devices/platform/smapi/BAT0/installed # 0 or 1
|
||||
+/sys/devices/platform/smapi/BAT0/state # idle/charging/discharging
|
||||
+/sys/devices/platform/smapi/BAT0/cycle_count # integer counter
|
||||
+/sys/devices/platform/smapi/BAT0/current_now # instantaneous current
|
||||
+/sys/devices/platform/smapi/BAT0/current_avg # last minute average
|
||||
+/sys/devices/platform/smapi/BAT0/power_now # instantaneous power
|
||||
+/sys/devices/platform/smapi/BAT0/power_avg # last minute average
|
||||
+/sys/devices/platform/smapi/BAT0/last_full_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_percent # remaining percent of energy (set by calibration)
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_percent_error # error range of remaing_percent (not reset by calibration)
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_running_time # in minutes, by last minute average power
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_running_time_now # in minutes, by instantenous power
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_charging_time # in minutes
|
||||
+/sys/devices/platform/smapi/BAT0/remaining_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/design_capacity # in mWh
|
||||
+/sys/devices/platform/smapi/BAT0/voltage # in mV
|
||||
+/sys/devices/platform/smapi/BAT0/design_voltage # in mV
|
||||
+/sys/devices/platform/smapi/BAT0/charging_max_current # max charging current
|
||||
+/sys/devices/platform/smapi/BAT0/charging_max_voltage # max charging voltage
|
||||
+/sys/devices/platform/smapi/BAT0/group{0,1,2,3}_voltage # see below
|
||||
+/sys/devices/platform/smapi/BAT0/manufacturer # string
|
||||
+/sys/devices/platform/smapi/BAT0/model # string
|
||||
+/sys/devices/platform/smapi/BAT0/barcoding # string
|
||||
+/sys/devices/platform/smapi/BAT0/chemistry # string
|
||||
+/sys/devices/platform/smapi/BAT0/serial # integer
|
||||
+/sys/devices/platform/smapi/BAT0/manufacture_date # YYYY-MM-DD
|
||||
+/sys/devices/platform/smapi/BAT0/first_use_date # YYYY-MM-DD
|
||||
+/sys/devices/platform/smapi/BAT0/temperature # in milli-Celsius
|
||||
+/sys/devices/platform/smapi/BAT0/dump # see below
|
||||
+/sys/devices/platform/smapi/ac_connected # 0 or 1
|
||||
+
|
||||
+The BAT0/group{0,1,2,3}_voltage attribute refers to the separate cell groups
|
||||
+in each battery. For example, on the ThinkPad 600, X3x, T4x and R5x models,
|
||||
+the battery contains 3 cell groups in series, where each group consisting of 2
|
||||
+or 3 cells connected in parallel. The voltage of each group is given by these
|
||||
+attributes, and their sum (roughly) equals the "voltage" attribute.
|
||||
+(The effective performance of the battery is determined by the weakest group,
|
||||
+i.e., the one those voltage changes most rapidly during dis/charging.)
|
||||
+
|
||||
+The "BAT0/dump" attribute gives a a hex dump of the raw status data, which
|
||||
+contains additional data now in the above (if you can figure it out). Some
|
||||
+unused values are autodetected and replaced by "--":
|
||||
+
|
||||
+In all of the above, replace BAT0 with BAT1 to address the 2nd battery (e.g.
|
||||
+in the UltraBay).
|
||||
+
|
||||
+
|
||||
+Raw SMAPI calls:
|
||||
+
|
||||
+/sys/devices/platform/smapi/smapi_request
|
||||
+This performs raw SMAPI calls. It uses a bad interface that cannot handle
|
||||
+multiple simultaneous access. Don't touch it, it's for development only.
|
||||
+If you did touch it, you would so something like
|
||||
+# echo '211a 100 0 0' > /sys/devices/platform/smapi/smapi_request
|
||||
+# cat /sys/devices/platform/smapi/smapi_request
|
||||
+and notice that in the output "211a 34b b2 0 0 0 'OK'", the "4b" in the 2nd
|
||||
+value, converted to decimal is 75: the current charge stop threshold.
|
||||
+
|
||||
+
|
||||
+Model-specific status
|
||||
+---------------------
|
||||
+
|
||||
+Works (at least partially) on the following ThinkPad model:
|
||||
+* A30
|
||||
+* G41
|
||||
+* R40, R50p, R51, R52
|
||||
+* T23, T40, T40p, T41, T41p, T42, T42p, T43, T43p, T60, T61, T400, T410, T420 (partially)
|
||||
+* X24, X31, X32, X40, X41, X60, X61, X200, X201, X220 (partially)
|
||||
+* Z60t, Z61m
|
||||
+
|
||||
+Does not work on:
|
||||
+* X230 and newer
|
||||
+* T430 and newer
|
||||
+* Any ThinkPad Edge
|
||||
+* Any ThinkPad Yoga
|
||||
+* Any ThinkPad L series
|
||||
+* Any ThinkPad P series
|
||||
+
|
||||
+Not all functions are available on all models; for detailed status, see:
|
||||
+ http://thinkwiki.org/wiki/tp_smapi
|
||||
+
|
||||
+Please report success/failure by e-mail or on the Wiki.
|
||||
+If you get a "not implemented" or "not supported" message, your laptop
|
||||
+probably just can't do that (at least not via the SMAPI BIOS).
|
||||
+For negative reports, follow the bug reporting guidelines below.
|
||||
+If you send me the necessary technical data (i.e., SMAPI function
|
||||
+interfaces), I will support additional models.
|
||||
+
|
||||
+
|
||||
+Additional HDAPS features
|
||||
+-------------------------
|
||||
+
|
||||
+The modified hdaps driver has several improvements on the one in mainline
|
||||
+(beyond resolving the conflict with thinkpad_ec and tp_smapi):
|
||||
+
|
||||
+- Fixes reliability and improves support for recent ThinkPad models
|
||||
+ (especially *60 and newer). Unlike the mainline driver, the modified hdaps
|
||||
+ correctly follows the Embedded Controller communication protocol.
|
||||
+
|
||||
+- Extends the "invert" parameter to cover all possible axis orientations.
|
||||
+ The possible values are as follows.
|
||||
+ Let X,Y denote the hardware readouts.
|
||||
+ Let R denote the laptop's roll (tilt left/right).
|
||||
+ Let P denote the laptop's pitch (tilt forward/backward).
|
||||
+ invert=0: R= X P= Y (same as mainline)
|
||||
+ invert=1: R=-X P=-Y (same as mainline)
|
||||
+ invert=2: R=-X P= Y (new)
|
||||
+ invert=3: R= X P=-Y (new)
|
||||
+ invert=4: R= Y P= X (new)
|
||||
+ invert=5: R=-Y P=-X (new)
|
||||
+ invert=6: R=-Y P= X (new)
|
||||
+ invert=7: R= Y P=-X (new)
|
||||
+ It's probably easiest to just try all 8 possibilities and see which yields
|
||||
+ correct results (e.g., in the hdaps-gl visualisation).
|
||||
+
|
||||
+- Adds a whitelist which automatically sets the correct axis orientation for
|
||||
+ some models. If the value for your model is wrong or missing, you can override
|
||||
+ it using the "invert" parameter. Please also update the tables at
|
||||
+ http://www.thinkwiki.org/wiki/tp_smapi and
|
||||
+ http://www.thinkwiki.org/wiki/List_of_DMI_IDs
|
||||
+ and submit a patch for the whitelist in hdaps.c.
|
||||
+
|
||||
+- Provides new attributes:
|
||||
+ /sys/devices/platform/hdaps/sampling_rate:
|
||||
+ This determines the frequency at which the host queries the embedded
|
||||
+ controller for accelerometer data (and informs the hdaps input devices).
|
||||
+ Default=50.
|
||||
+ /sys/devices/platform/hdaps/oversampling_ratio:
|
||||
+ When set to X, the embedded controller is told to do physical accelerometer
|
||||
+ measurements at a rate that is X times higher than the rate at which
|
||||
+ the driver reads those measurements (i.e., X*sampling_rate). This
|
||||
+ makes the readouts from the embedded controller more fresh, and is also
|
||||
+ useful for the running average filter (see next). Default=5
|
||||
+ /sys/devices/platform/hdaps/running_avg_filter_order:
|
||||
+ When set to X, reported readouts will be the average of the last X physical
|
||||
+ accelerometer measurements. Current firmware allows 1<=X<=8. Setting to a
|
||||
+ high value decreases readout fluctuations. The averaging is handled by the
|
||||
+ embedded controller, so no CPU resources are used. Higher values make the
|
||||
+ readouts smoother, since it averages out both sensor noise (good) and abrupt
|
||||
+ changes (bad). Default=2.
|
||||
+
|
||||
+- Provides a second input device, which publishes the raw accelerometer
|
||||
+ measurements (without the fuzzing needed for joystick emulation). This input
|
||||
+ device can be matched by a udev rule such as the following (all on one line):
|
||||
+ KERNEL=="event[0-9]*", ATTRS{phys}=="hdaps/input1",
|
||||
+ ATTRS{modalias}=="input:b0019v1014p5054e4801-*",
|
||||
+ SYMLINK+="input/hdaps/accelerometer-event
|
||||
+
|
||||
+A new version of the hdapsd userspace daemon, which uses the input device
|
||||
+interface instead of polling sysfs, is available seprately. Using this reduces
|
||||
+the total interrupts per second generated by hdaps+hdapsd (on tickless kernels)
|
||||
+to 50, down from a value that fluctuates between 50 and 100. Set the
|
||||
+sampling_rate sysfs attribute to a lower value to further reduce interrupts,
|
||||
+at the expense of response latency.
|
||||
+
|
||||
+Licensing note: all my changes to the HDAPS driver are licensed under the
|
||||
+GPL version 2 or, at your option and to the extent allowed by derivation from
|
||||
+prior works, any later version. My version of hdaps is derived work from the
|
||||
+mainline version, which at the time of writing is available only under
|
||||
+GPL version 2.
|
||||
+
|
||||
+Bug reporting
|
||||
+-------------
|
||||
+
|
||||
+Mail <multinymous@gmail.com>. Please include:
|
||||
+* Details about your model,
|
||||
+* Relevant "dmesg" output. Make sure thinkpad_ec and tp_smapi are loaded with
|
||||
+ the "debug=1" parameter (e.g., use "make load HDAPS=1 DEBUG=1").
|
||||
+* Output of "dmidecode | grep -C5 Product"
|
||||
+* Does the failed functionality works under Windows?
|
||||
+
|
||||
+
|
||||
+More about SMAPI
|
||||
+----------------
|
||||
+
|
||||
+For hints about what may be possible via the SMAPI BIOS and how, see:
|
||||
+
|
||||
+* IBM Technical Reference Manual for the ThinkPad 770
|
||||
+ (http://www-307.ibm.com/pc/support/site.wss/document.do?lndocid=PFAN-3TUQQD)
|
||||
+* Exported symbols in PWRMGRIF.DLL or TPPWRW32.DLL (e.g., use "objdump -x").
|
||||
+* drivers/char/mwave/smapi.c in the Linux kernel tree.*
|
||||
+* The "thinkpad" SMAPI module (http://tpctl.sourceforge.net).
|
||||
+* The SMAPI_* constants in tp_smapi.c.
|
||||
+
|
||||
+Note that in the above Technical Reference and in the "thinkpad" module,
|
||||
+SMAPI is invoked through a function call to some physical address. However,
|
||||
+the interface used by tp_smapi and the above mwave drive, and apparently
|
||||
+required by newer ThinkPad, is different: you set the parameters up in the
|
||||
+CPU's registers and write to ports 0xB2 (the APM control port) and 0x4F; this
|
||||
+triggers an SMI (System Management Interrupt), causing the CPU to enter
|
||||
+SMM (System Management Mode) and run the BIOS firmware; the results are
|
||||
+returned in the CPU's registers. It is not clear what is the relation between
|
||||
+the two variants of SMAPI, though the assignment of error codes seems to be
|
||||
+similar.
|
||||
+
|
||||
+In addition, the embedded controller on ThinkPad laptops has a non-standard
|
||||
+interface at IO ports 0x1600-0x161F (mapped to LCP channel 3 of the H8S chip).
|
||||
+The interface provides various system management services (currently known:
|
||||
+battery information and accelerometer readouts). For more information see the
|
||||
+thinkpad_ec module and the H8S hardware documentation:
|
||||
+http://documentation.renesas.com/eng/products/mpumcu/rej09b0300_2140bhm.pdf
|
||||
diff --git a/init/Kconfig b/init/Kconfig
|
||||
index b4daad2bac23..c1e59dc04209 100644
|
||||
--- a/init/Kconfig
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user