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arm: dynarmic: Cleanup icache op handling

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This commit is contained in:
jam1garner
2021-11-21 21:24:07 -05:00
parent c8a67a725d
commit 4d9c9e567e
1 changed files with 9 additions and 10 deletions
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19
src/core/arm/dynarmic/arm_dynarmic_64.cpp
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@@ -88,22 +88,21 @@ public:
void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op,
VAddr value) override {
constexpr u64 ICACHE_LINE_SIZE = 64;
u64 cache_line_start;
switch (op) {
case Dynarmic::A64::InstructionCacheOperation::InvalidateByVAToPoU:
cache_line_start = value & ~(ICACHE_LINE_SIZE - 1);
parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE);
return;
case Dynarmic::A64::InstructionCacheOperation::InvalidateByVAToPoU: {
static constexpr u64 ICACHE_LINE_SIZE = 64;
const u64 cache_line_start = value & ~(ICACHE_LINE_SIZE - 1);
parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE);
break;
}
case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoU:
parent.ClearInstructionCache();
return;
break;
case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoUInnerSharable:
default:
LOG_DEBUG(Core_ARM, "Unprocesseed instruction cache operation");
LOG_DEBUG(Core_ARM, "Unprocesseed instruction cache operation: {}", op);
break;
}
}